| /Zephyr-latest/drivers/sensor/st/stm32_digi_temp/ |
| D | stm32_digi_temp.c | 54 DTS_TypeDef *dts = cfg->base; in stm32_digi_temp_isr() local
57 SET_BIT(dts->ICIFR, DTS_ICIFR_TS1_CITEF); in stm32_digi_temp_isr()
67 DTS_TypeDef *dts = cfg->base; in stm32_digi_temp_sample_fetch() local
76 while (READ_BIT(dts->SR, DTS_SR_TS1_RDY) == 0) { in stm32_digi_temp_sample_fetch()
81 SET_BIT(dts->CFGR1, DTS_CFGR1_TS1_START); in stm32_digi_temp_sample_fetch()
82 CLEAR_BIT(dts->CFGR1, DTS_CFGR1_TS1_START); in stm32_digi_temp_sample_fetch()
88 data->raw = READ_REG(dts->DR); in stm32_digi_temp_sample_fetch()
115 DTS_TypeDef *dts = cfg->base; in stm32_digi_temp_configure() local
122 MODIFY_REG(dts->CFGR1, DTS_CFGR1_HSREF_CLK_DIV_Msk, in stm32_digi_temp_configure()
126 MODIFY_REG(dts->CFGR1, DTS_CFGR1_REFCLK_SEL_Msk, in stm32_digi_temp_configure()
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|
| /Zephyr-latest/doc/build/dts/ |
| D | intro-input-output.rst | 21 - sources (``.dts``)
30 boards/<ARCH>/<BOARD>/<BOARD>.dts
31 dts/common/skeleton.dtsi
32 dts/<ARCH>/.../<SOC>.dtsi
33 dts/bindings/.../binding.yaml
35 Generally speaking, every supported board has a :file:`BOARD.dts` file
37 :zephyr_file:`boards/phytec/reel_board/reel_board.dts`.
39 :file:`BOARD.dts` includes one or more ``.dtsi`` files. These ``.dtsi`` files
42 multiple boards. In addition to these includes, :file:`BOARD.dts` also describes
45 The :file:`dts/common` directory contains :file:`skeleton.dtsi`, a minimal
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|
| /Zephyr-latest/cmake/modules/ |
| D | dts.cmake | 36 # files in scripts/dts to make all this work. We also optionally will
57 # - ${PROJECT_BINARY_DIR}/zephyr.dts exists
59 # - ${KCONFIG_BINARY_DIR}/Kconfig.dts exists
97 # ${BOARD_DIRECTORIES}/<normalized_board_target>.dts
103 set(DT_SCRIPTS ${ZEPHYR_BASE}/scripts/dts)
113 set(ZEPHYR_DTS ${PROJECT_BINARY_DIR}/zephyr.dts)
117 set(DTS_POST_CPP ${PROJECT_BINARY_DIR}/zephyr.dts.pre)
118 set(DTS_DEPS ${PROJECT_BINARY_DIR}/zephyr.dts.d)
123 set(DTS_KCONFIG ${KCONFIG_BINARY_DIR}/Kconfig.dts)
129 set(DTS_CMAKE ${PROJECT_BINARY_DIR}/dts.cmake)
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|
| /Zephyr-latest/boards/beagle/beaglev_fire/ |
| D | beaglev_fire_polarfire_u54_smp.dts | 1 /dts-v1/;
2 #include "beaglev_fire_polarfire_u54.dts"
|
| /Zephyr-latest/boards/arm/fvp_baser_aemv8r/ |
| D | fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts | 6 /dts-v1/;
8 #include "fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts"
|
| /Zephyr-latest/boards/others/promicro_nrf52840/ |
| D | promicro_nrf52840_nrf52840.dts | 7 /dts-v1/;
8 #include "promicro_nrf52840_nrf52840_common.dts"
|
| D | promicro_nrf52840_nrf52840_uf2.dts | 7 /dts-v1/;
8 #include "promicro_nrf52840_nrf52840_common.dts"
|
| /Zephyr-latest/boards/microchip/mpfs_icicle/ |
| D | mpfs_icicle_polarfire_u54_smp.dts | 1 /dts-v1/;
2 #include "mpfs_icicle_polarfire_u54.dts"
|
| /Zephyr-latest/boards/nxp/imx93_evk/ |
| D | imx93_evk_mimx9352_m33_ddr.dts | 7 /dts-v1/;
9 #include "imx93_evk_mimx9352_m33.dts"
|
| /Zephyr-latest/boards/nxp/imx95_evk/ |
| D | imx95_evk_mimx9596_m7_ddr.dts | 7 /dts-v1/;
9 #include "imx95_evk_mimx9596_m7.dts"
|
| /Zephyr-latest/boards/raytac/mdbt53_db_40/ |
| D | raytac_mdbt53_db_40_nrf5340_cpuapp_ns.dts | 7 /dts-v1/;
9 #include "raytac_mdbt53_db_40_nrf5340_cpuapp_common.dts"
|
| D | raytac_mdbt53_db_40_nrf5340_cpuapp.dts | 7 /dts-v1/;
9 #include "raytac_mdbt53_db_40_nrf5340_cpuapp_common.dts"
|
| D | raytac_mdbt53_db_40_nrf5340_cpunet.dts | 7 /dts-v1/;
10 #include "raytac_mdbt53_db_40_nrf5340_cpunet_common.dts"
|
| /Zephyr-latest/boards/raytac/mdbt53v_db_40/ |
| D | raytac_mdbt53v_db_40_nrf5340_cpuapp_ns.dts | 7 /dts-v1/;
9 #include "raytac_mdbt53v_db_40_nrf5340_cpuapp_common.dts"
|
| D | raytac_mdbt53v_db_40_nrf5340_cpuapp.dts | 7 /dts-v1/;
9 #include "raytac_mdbt53v_db_40_nrf5340_cpuapp_common.dts"
|
| D | raytac_mdbt53v_db_40_nrf5340_cpunet.dts | 7 /dts-v1/;
10 #include "raytac_mdbt53v_db_40_nrf5340_cpunet_common.dts"
|
| /Zephyr-latest/modules/hal_nordic/nrf-regtool/ |
| D | nrf-regtoolConfig.cmake | 8 ${CMAKE_COMMAND} -E env PYTHONPATH=${ZEPHYR_BASE}/scripts/dts/python-devicetree/src
26 ${CMAKE_COMMAND} -E env PYTHONPATH=${ZEPHYR_BASE}/scripts/dts/python-devicetree/src
30 --dts-file ${ZEPHYR_DTS}
|
| /Zephyr-latest/boards/intel/adsp/ |
| D | intel_adsp_ace15_mtpm_sim.dts | 3 #include "intel_adsp_ace15_mtpm.dts"
|
| D | intel_adsp_ace20_lnl_sim.dts | 3 #include "intel_adsp_ace20_lnl.dts"
|
| /Zephyr-latest/boards/qemu/cortex_a53/ |
| D | qemu_cortex_a53_qemu_cortex_a53_smp.dts | 8 #include "qemu_cortex_a53.dts"
|
| /Zephyr-latest/samples/boards/st/mco/ |
| D | README.rst | 17 To support another board, add a dts overlay file in boards folder.
18 Make sure that the output clock is enabled in dts overlay file.
23 See :zephyr_file:`dts/bindings/clock/st,stm32-clock-mco.yaml`
|
| /Zephyr-latest/boards/qemu/x86/ |
| D | qemu_x86_atom_nommu.dts | 4 #include "qemu_x86.dts"
|
| D | qemu_x86_atom_nopae.dts | 7 #include "qemu_x86.dts"
|
| D | qemu_x86_atom_virt.dts | 7 #include "qemu_x86.dts"
|
| D | qemu_x86_atom_nokpti.dts | 7 #include "qemu_x86.dts"
|
