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/Zephyr-latest/drivers/clock_control/
Dclock_control_litex.c290 uint16_t divreg, mult2; in litex_clk_update_global_config() local
297 ret = litex_clk_get_DO(DIV_REG, &divreg); in litex_clk_update_global_config()
316 if (divreg & (NO_CNT_MASK << NO_CNT_DIVREG_POS)) { in litex_clk_update_global_config()
319 low_time = divreg & HL_TIME_MASK; in litex_clk_update_global_config()
320 high_time = (divreg >> HIGH_TIME_POS) & HL_TIME_MASK; in litex_clk_update_global_config()