| /Zephyr-latest/include/zephyr/drivers/ | 
| D | mdio.h | 52 	int (*read_c45)(const struct device *dev, uint8_t prtad, uint8_t devad,56 	int (*write_c45)(const struct device *dev, uint8_t prtad, uint8_t devad,
 182 			    uint8_t devad, uint16_t regad, uint16_t *data);
 185 				       uint8_t devad, uint16_t regad,  in z_impl_mdio_read_c45()  argument
 195 	return api->read_c45(dev, prtad, devad, regad, data);  in z_impl_mdio_read_c45()
 216 			     uint8_t devad, uint16_t regad, uint16_t data);
 219 					uint8_t devad, uint16_t regad,  in z_impl_mdio_write_c45()  argument
 229 	return api->write_c45(dev, prtad, devad, regad, data);  in z_impl_mdio_write_c45()
 
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| /Zephyr-latest/drivers/mdio/ | 
| D | mdio_lan865x.c | 49 static int lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad,  in lan865x_mdio_c45_read()  argument54 	return eth_lan865x_mdio_c45_read(cfg->dev, prtad, devad, regad, data);  in lan865x_mdio_c45_read()
 57 static int lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad,  in lan865x_mdio_c45_write()  argument
 62 	return eth_lan865x_mdio_c45_write(cfg->dev, prtad, devad, regad, data);  in lan865x_mdio_c45_write()
 
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| D | mdio_gpio.c | 76 static int mdio_gpio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw,  in mdio_gpio_transfer()  argument95 	mdio_gpio_write(dev_cfg, devad, 5);  in mdio_gpio_transfer()
 115 static int mdio_gpio_read_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_gpio_read_mmi()  argument
 118 	return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_READ_OP, 0, data);  in mdio_gpio_read_mmi()
 121 static int mdio_gpio_write_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_gpio_write_mmi()  argument
 124 	return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_WRITE_OP, data, NULL);  in mdio_gpio_write_mmi()
 
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| D | mdio_litex_liteeth.c | 98 static int mdio_litex_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw,  in mdio_litex_transfer()  argument116 	mdio_litex_write(dev_cfg, devad, 5);  in mdio_litex_transfer()
 134 static int mdio_litex_read_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_litex_read_mmi()  argument
 137 	return mdio_litex_transfer(dev, prtad, devad, LITEX_MDIO_READ_OP, 0, data);  in mdio_litex_read_mmi()
 140 static int mdio_litex_write_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_litex_write_mmi()  argument
 143 	return mdio_litex_transfer(dev, prtad, devad, LITEX_MDIO_WRITE_OP, data, NULL);  in mdio_litex_write_mmi()
 
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| D | mdio_sam.c | 96 			     uint8_t devad, uint16_t regad, uint16_t *data)  in mdio_sam_read_c45()  argument100 	err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true,  in mdio_sam_read_c45()
 103 		err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_READ, true,  in mdio_sam_read_c45()
 111 			      uint8_t devad, uint16_t regad, uint16_t data)  in mdio_sam_write_c45()  argument
 115 	err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true,  in mdio_sam_write_c45()
 118 		err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_WRITE, true,  in mdio_sam_write_c45()
 
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| D | mdio_adin2111.c | 59 				  uint8_t devad, uint16_t regad,  in mdio_adin2111_read_c45()  argument69 	cmd |= (devad & 0x1FU) << 16;  in mdio_adin2111_read_c45()
 99 				   uint8_t devad, uint16_t regad,  in mdio_adin2111_write_c45()  argument
 110 	cmd |= (devad & 0x1FU) << 16;  in mdio_adin2111_write_c45()
 
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| D | mdio_nxp_s32_gmac.c | 38 static int mdio_nxp_s32_read_c45(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_nxp_s32_read_c45()  argument50 	status = Gmac_Ip_MDIOReadMMD(cfg->instance, prtad, devad, regad, regval,  in mdio_nxp_s32_read_c45()
 58 static int mdio_nxp_s32_write_c45(const struct device *dev, uint8_t prtad, uint8_t devad,  in mdio_nxp_s32_write_c45()  argument
 70 	status = Gmac_Ip_MDIOWriteMMD(cfg->instance, prtad, devad, regad, regval,  in mdio_nxp_s32_write_c45()
 
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| D | mdio_dwcxgmac.c | 86 static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw,  in mdio_transfer()  argument113 	mdio_addr = CORE_MDIO_SINGLE_COMMAND_ADDRESS_RA_SET(devad) |  in mdio_transfer()
 
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| /Zephyr-latest/include/zephyr/drivers/ethernet/ | 
| D | eth_lan865x.h | 69 int eth_lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad,89 int eth_lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad,
 
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| /Zephyr-latest/include/zephyr/net/ | 
| D | phy.h | 180 	int (*read_c45)(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t *data);183 	int (*write_c45)(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t data);
 330 static inline int phy_read_c45(const struct device *dev, uint8_t devad, uint16_t regad,  in phy_read_c45()  argument
 339 	return api->read_c45(dev, devad, regad, data);  in phy_read_c45()
 355 static inline int phy_write_c45(const struct device *dev, uint8_t devad, uint16_t regad,  in phy_write_c45()  argument
 364 	return api->write_c45(dev, devad, regad, data);  in phy_write_c45()
 
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| /Zephyr-latest/drivers/ethernet/phy/ | 
| D | phy_microchip_t1s.c | 123 static int mdio_setup_c45_indirect_access(const struct device *dev, uint16_t devad, uint16_t reg)  in mdio_setup_c45_indirect_access()  argument128 	ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad);  in mdio_setup_c45_indirect_access()
 138 	return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad | BIT(14));  in mdio_setup_c45_indirect_access()
 141 static int phy_mc_t1s_c45_read(const struct device *dev, uint8_t devad, uint16_t reg, uint16_t *val)  in phy_mc_t1s_c45_read()  argument
 146 	ret = mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_mc_t1s_c45_read()
 150 		ret = mdio_setup_c45_indirect_access(dev, devad, reg);  in phy_mc_t1s_c45_read()
 161 static int phy_mc_t1s_c45_write(const struct device *dev, uint8_t devad, uint16_t reg, uint16_t val)  in phy_mc_t1s_c45_write()  argument
 166 	ret = mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_mc_t1s_c45_write()
 170 		ret = mdio_setup_c45_indirect_access(dev, devad, reg);  in phy_mc_t1s_c45_write()
 
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| D | phy_adin2111.c | 125 static int phy_adin2111_c45_setup_dev_reg(const struct device *dev, uint16_t devad,  in phy_adin2111_c45_setup_dev_reg()  argument131 	rval = mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad);  in phy_adin2111_c45_setup_dev_reg()
 140 	return mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad | BIT(14));  in phy_adin2111_c45_setup_dev_reg()
 143 static int phy_adin2111_c45_read(const struct device *dev, uint16_t devad,  in phy_adin2111_c45_read()  argument
 151 		rval = phy_adin2111_c45_setup_dev_reg(dev, devad, reg);  in phy_adin2111_c45_read()
 159 	return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_adin2111_c45_read()
 162 static int phy_adin2111_c45_write(const struct device *dev, uint16_t devad,  in phy_adin2111_c45_write()  argument
 170 		rval = phy_adin2111_c45_setup_dev_reg(dev, devad, reg);  in phy_adin2111_c45_write()
 178 	return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_adin2111_c45_write()
 
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| D | phy_tja1103.c | 93 static inline int phy_tja1103_c45_write(const struct device *dev, uint16_t devad, uint16_t reg,  in phy_tja1103_c45_write()  argument98 	return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_tja1103_c45_write()
 101 static inline int phy_tja1103_c45_read(const struct device *dev, uint16_t devad, uint16_t reg,  in phy_tja1103_c45_read()  argument
 106 	return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val);  in phy_tja1103_c45_read()
 
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| /Zephyr-latest/drivers/ethernet/ | 
| D | oa_tc6.c | 175 static int oa_tc6_get_phy_c45_mms(int devad)  in oa_tc6_get_phy_c45_mms()  argument177 	switch (devad) {  in oa_tc6_get_phy_c45_mms()
 191 int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,  in oa_tc6_mdio_read_c45()  argument
 197 	ret = oa_tc6_get_phy_c45_mms(devad);  in oa_tc6_mdio_read_c45()
 212 int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,  in oa_tc6_mdio_write_c45()  argument
 217 	ret = oa_tc6_get_phy_c45_mms(devad);  in oa_tc6_mdio_write_c45()
 
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| D | oa_tc6.h | 303 int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,320 int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
 
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| D | eth_lan865x.c | 41 int eth_lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad,  in eth_lan865x_mdio_c45_read()  argument46 	return oa_tc6_mdio_read_c45(ctx->tc6, prtad, devad, regad, data);  in eth_lan865x_mdio_c45_read()
 49 int eth_lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad,  in eth_lan865x_mdio_c45_write()  argument
 54 	return oa_tc6_mdio_write_c45(ctx->tc6, prtad, devad, regad, data);  in eth_lan865x_mdio_c45_write()
 
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| D | eth_smsc91x.c | 859 static int mdio_smsc_read(const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t *data)  in mdio_smsc_read()  argument866 	*data = smsc_miibus_readreg(sc, prtad, devad);  in mdio_smsc_read()
 871 static int mdio_smsc_write(const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t data)  in mdio_smsc_write()  argument
 878 	smsc_miibus_writereg(sc, prtad, devad, data);  in mdio_smsc_write()
 
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