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Searched refs:cpu0intr_set (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/ipm/
Dipm_mhu.h27 volatile uint32_t cpu0intr_set; /* ( /W) CPU 0 Interrupt Set Register */ member
Dipm_mhu.c83 p_mhu_dev->cpu0intr_set = set_val; in ipm_mhu_send()