Searched refs:clk_phase (Results 1 – 5 of 5) sorted by relevance
| /Zephyr-latest/drivers/spi/ |
| D | spi_nxp_s32.c | 269 bool clk_phase, clk_polarity; in spi_nxp_s32_configure() local
290 clk_phase = !!(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA); in spi_nxp_s32_configure()
367 data->transfer_cfg.Ctar |= SPI_CTAR_CPHA(clk_phase) | SPI_CTAR_CPOL(clk_polarity); in spi_nxp_s32_configure()
378 clk_polarity, clk_phase, lsb, frame_size); in spi_nxp_s32_configure()
383 best_baud.frequency, clk_polarity, clk_phase, in spi_nxp_s32_configure()
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| D | spi_b_renesas_ra8.c | 116 data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_EVEN; in ra_spi_b_configure()
118 data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_ODD; in ra_spi_b_configure()
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| D | spi_renesas_ra.c | 112 data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_EVEN; in ra_spi_configure()
115 data->fsp_config.clk_phase = SPI_CLK_PHASE_EDGE_ODD; in ra_spi_configure()
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| /Zephyr-latest/drivers/flash/ |
| D | flash_cadence_qspi_nor_ll.h | 174 uint32_t clk_phase, uint32_t clk_pol, uint32_t csda,
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| D | flash_cadence_qspi_nor_ll.c | 610 int cad_qspi_init(struct cad_qspi_params *cad_params, uint32_t clk_phase, uint32_t clk_pol, in cad_qspi_init() argument
629 status = cad_qspi_timing_config(cad_params, clk_phase, clk_pol, csda, csdads, cseot, cssot, in cad_qspi_init()
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