Searched refs:channel_offset (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/soc/sensry/ganymed/sy1xx/common/ |
| D | udma.c | 112 uint32_t channel_offset = channel == 0 ? 0x00 : 0x10; in sy1xx_udma_cancel() local
115 SY1XX_UDMA_WRITE_REG(base, SY1XX_UDMA_CFG_REG + channel_offset, in sy1xx_udma_cancel()
122 uint32_t channel_offset = channel == 0 ? 0x00 : 0x10; in sy1xx_udma_is_ready() local
124 int32_t isBusy = SY1XX_UDMA_READ_REG(base, SY1XX_UDMA_CFG_REG + channel_offset) & in sy1xx_udma_is_ready()
132 uint32_t channel_offset = channel == 0 ? 0x00 : 0x10; in sy1xx_udma_wait_for_finished() local
136 while (SY1XX_UDMA_READ_REG(base, SY1XX_UDMA_CFG_REG + channel_offset) & in sy1xx_udma_wait_for_finished()
167 uint32_t channel_offset = channel == 0 ? 0x00 : 0x10; in sy1xx_udma_start() local
169 SY1XX_UDMA_WRITE_REG(base, SY1XX_UDMA_SADDR_REG + channel_offset, saddr); in sy1xx_udma_start()
170 SY1XX_UDMA_WRITE_REG(base, SY1XX_UDMA_SIZE_REG + channel_offset, size); in sy1xx_udma_start()
171 SY1XX_UDMA_WRITE_REG(base, SY1XX_UDMA_CFG_REG + channel_offset, in sy1xx_udma_start()
[all …]
|
| /Zephyr-latest/drivers/spi/ |
| D | spi_esp32_spim.c | 172 uint8_t channel_offset; in spi_esp32_init_dma() local
188 channel_offset = 0; in spi_esp32_init_dma()
190 channel_offset = 1; in spi_esp32_init_dma()
201 data->hal_config.tx_dma_chan = cfg->dma_host + channel_offset; in spi_esp32_init_dma()
202 data->hal_config.rx_dma_chan = cfg->dma_host + channel_offset; in spi_esp32_init_dma()
|
| /Zephyr-latest/drivers/adc/ |
| D | adc_stm32.c | 576 uint32_t channel_offset = 0U; in adc_stm32_calibrate() local
580 channel_offset = 0UL; in adc_stm32_calibrate()
582 channel_offset = 8UL; in adc_stm32_calibrate()
584 channel_offset = 16UL; in adc_stm32_calibrate()
589 ADC_LINEAR_CALIB_REG_1_ADDR + channel_offset + count in adc_stm32_calibrate()
|
