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Searched refs:channel_num (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/drivers/input/
Dinput_esp32_touch_sensor.c45 int32_t channel_num; member
102 touch_hal_read_benchmark(channel_cfg->channel_num,
104 touch_hal_set_threshold(channel_cfg->channel_num,
120 channel_status = (pad_status >> channel_cfg->channel_num) & 0x01;
125 uint32_t channel_num = (uint32_t)touch_hal_get_current_meas_channel();
127 if (channel_cfg->channel_num == channel_num) {
202 if (!(channel_cfg->channel_num > 0 &&
203 channel_cfg->channel_num < SOC_TOUCH_SENSOR_NUM)) {
210 if (channel_cfg->channel_num == SOC_TOUCH_DENOISE_CHANNEL) {
217 gpio_num_t gpio_num = touch_sensor_channel_io_map[channel_cfg->channel_num];
[all …]
/Zephyr-latest/drivers/pwm/
Dpwm_led_esp32.c43 const uint8_t channel_num; member
98 ledc_hal_set_hpoint(&data->hal, channel->channel_num, 0); in pwm_led_esp32_duty_set()
99 ledc_hal_set_duty_int_part(&data->hal, channel->channel_num, channel->duty_val); in pwm_led_esp32_duty_set()
100 ledc_hal_set_duty_direction(&data->hal, channel->channel_num, 1); in pwm_led_esp32_duty_set()
101 ledc_hal_set_duty_num(&data->hal, channel->channel_num, 1); in pwm_led_esp32_duty_set()
102 ledc_hal_set_duty_cycle(&data->hal, channel->channel_num, 1); in pwm_led_esp32_duty_set()
103 ledc_hal_set_duty_scale(&data->hal, channel->channel_num, 0); in pwm_led_esp32_duty_set()
104 pwm_led_esp32_low_speed_update(dev, channel->speed_mode, channel->channel_num); in pwm_led_esp32_duty_set()
105 pwm_led_esp32_update_duty(dev, channel->speed_mode, channel->channel_num); in pwm_led_esp32_duty_set()
126 ledc_hal_bind_channel_timer(&data->hal, channel->channel_num, channel->timer_num); in pwm_led_esp32_bind_channel_timer()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_xilinx_axi_dma.c270 const uint32_t channel_num) in dma_xilinx_axi_dma_lock_irq() argument
273 (void)channel_num; in dma_xilinx_axi_dma_lock_irq()
278 const uint32_t channel_num, int key) in dma_xilinx_axi_dma_unlock_irq() argument
281 (void)channel_num; in dma_xilinx_axi_dma_unlock_irq()
286 const uint32_t channel_num) in dma_xilinx_axi_dma_lock_irq() argument
289 (void)channel_num; in dma_xilinx_axi_dma_lock_irq()
305 const uint32_t channel_num, int key) in dma_xilinx_axi_dma_unlock_irq() argument
307 (void)channel_num; in dma_xilinx_axi_dma_unlock_irq()
320 const uint32_t channel_num) in dma_xilinx_axi_dma_lock_irq() argument
324 ret = irq_is_enabled(cfg->irq0_channels[channel_num]); in dma_xilinx_axi_dma_lock_irq()
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/Zephyr-latest/drivers/adc/
Dadc_mcux_lpadc.c132 uint8_t channel_num; in mcux_lpadc_channel_setup() local
147 channel_num = ADC_CMDL_ADCH(channel_cfg->input_positive); in mcux_lpadc_channel_setup()
149 LOG_DBG("Channel num: %u, channel side: %c", channel_num, in mcux_lpadc_channel_setup()
233 cmd->channelNumber = channel_num; in mcux_lpadc_channel_setup()
/Zephyr-latest/tests/drivers/mspi/api/src/
Dmain.c34 .channel_num = 0,
/Zephyr-latest/drivers/counter/
Dcounter_ifx_cat1.c80 hw_resource->channel_num = ((reg_addr_ptr - cnt) / sizeof(TCPWM_CNT_Type)); in get_hw_block_info()
82 if (hw_resource->channel_num >= _CYHAL_TCPWM_DATA[i].num_channels) { in get_hw_block_info()
/Zephyr-latest/include/zephyr/drivers/
Dmspi.h230 uint8_t channel_num; member
/Zephyr-latest/drivers/mspi/
Dmspi_emul.c862 .channel_num = EMUL_MSPI_INST_ID, \
Dmspi_ambiq_ap3.c467 ret = am_hal_mspi_initialize(config->channel_num, &data->mspiHandle); in mspi_ambiq_config()
1359 .channel_num = (DT_INST_REG_ADDR(n) - MSPI0_BASE) / \