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Searched refs:ch_cfg (Results 1 – 11 of 11) sorted by relevance

/Zephyr-latest/samples/shields/lmp90100_evb/rtd/src/
Dmain.c42 const struct adc_dt_spec ch_cfg = ADC_DT_SPEC_GET(DT_PATH(zephyr_user)); in main() local
43 double adc_max = ADC_MAX(ch_cfg.resolution); in main()
52 if (!adc_is_ready_dt(&ch_cfg)) { in main()
57 err = adc_channel_setup_dt(&ch_cfg); in main()
63 err = adc_sequence_init_dt(&ch_cfg, &seq); in main()
70 err = adc_read_dt(&ch_cfg, &seq); in main()
/Zephyr-latest/drivers/sensor/rpi_pico_temp/
Drpi_pico_temp.c21 const struct adc_channel_cfg ch_cfg; member
41 rc = adc_channel_setup(cfg->adc, &cfg->ch_cfg); in rpi_pico_temp_sample_fetch()
43 LOG_DBG("Setup ADC channel %u failed with %d", cfg->ch_cfg.channel_id, rc); in rpi_pico_temp_sample_fetch()
66 rc = adc_raw_to_millivolts(adc_ref_internal(cfg->adc), cfg->ch_cfg.gain, in rpi_pico_temp_channel_get()
109 .ch_cfg = \
/Zephyr-latest/modules/hal_nordic/nrfs/backends/
Dnrfs_backend_ipc_service.c145 struct ipc_channel_config *ch_cfg; in ipc_channel_init() local
149 ch_cfg = &ipc_cpusys_channel_config; in ipc_channel_init()
151 ret = ipc_service_open_instance(ch_cfg->ipc_instance); in ipc_channel_init()
159 ret = ipc_service_register_endpoint(ch_cfg->ipc_instance, in ipc_channel_init()
160 &ch_cfg->ipc_ept, in ipc_channel_init()
161 ch_cfg->endpoint_config); in ipc_channel_init()
/Zephyr-latest/drivers/sensor/lm35/
Dlm35.c29 struct adc_channel_cfg ch_cfg; member
55 err = adc_raw_to_millivolts(adc_ref_internal(cfg->adc), cfg->ch_cfg.gain, in lm35_channel_get()
82 adc_channel_setup(cfg->adc, &cfg->ch_cfg); in lm35_init()
99 .ch_cfg = { \
/Zephyr-latest/drivers/sensor/seeed/grove/
Dlight_sensor.c33 struct adc_channel_cfg ch_cfg; member
97 drv_data->ch_cfg = (struct adc_channel_cfg){ in gls_init()
111 adc_channel_setup(cfg->adc, &drv_data->ch_cfg); in gls_init()
Dtemperature_sensor.c31 struct adc_channel_cfg ch_cfg; member
99 drv_data->ch_cfg = (struct adc_channel_cfg){ in gts_init()
113 adc_channel_setup(cfg->adc, &drv_data->ch_cfg); in gts_init()
/Zephyr-latest/drivers/sensor/ti/fdc2x1x/
Dfdc2x1x.c37 *freq = (cfg->ch_cfg->fin_sel * (cfg->fref / 1000.0) * in fdc2x1x_raw_to_freq()
40 *freq = cfg->ch_cfg->fin_sel * (cfg->fref / 1000.0) * in fdc2x1x_raw_to_freq()
42 (cfg->ch_cfg[ch].offset / pow(2, 16))); in fdc2x1x_raw_to_freq()
59 *capacitance = 1 / ((cfg->ch_cfg->inductance / 1000000.0) * in fdc2x1x_raw_to_capacitance()
739 ret = fdc2x1x_set_fin_sel(dev, ch, cfg->ch_cfg[ch].fin_sel); in fdc2x1x_init_config()
745 cfg->ch_cfg[ch].fref_divider); in fdc2x1x_init_config()
750 ret = fdc2x1x_set_idrive(dev, ch, cfg->ch_cfg[ch].idrive); in fdc2x1x_init_config()
756 cfg->ch_cfg[ch].settle_count); in fdc2x1x_init_config()
761 ret = fdc2x1x_set_rcount(dev, ch, cfg->ch_cfg[ch].rcount); in fdc2x1x_init_config()
768 cfg->ch_cfg[ch].offset); in fdc2x1x_init_config()
[all …]
Dfdc2x1x.h206 const struct fdc2x1x_chx_config *ch_cfg; member
/Zephyr-latest/drivers/sensor/nxp/nxp_kinetis_temp/
Dtemp_kinetis.c145 const struct adc_channel_cfg ch_cfg[] = { in temp_kinetis_init() local
169 for (i = 0; i < ARRAY_SIZE(ch_cfg); i++) { in temp_kinetis_init()
170 err = adc_channel_setup(config->adc, &ch_cfg[i]); in temp_kinetis_init()
/Zephyr-latest/drivers/mbox/
Dmbox_nxp_s32_mru.c121 const Mru_Ip_ChannelCfgType *ch_cfg = cfg->hw_cfg.ChannelCfg; in nxp_s32_mru_set_enabled() local
136 *ch_cfg[channel].ChCFG0Add = RTU_MRU_CH_CFG0_CHE(1); in nxp_s32_mru_set_enabled()
137 *ch_cfg[channel].ChCFG0Add = RTU_MRU_CH_CFG0_IE(1) in nxp_s32_mru_set_enabled()
145 *ch_cfg[channel].ChCFG0Add = RTU_MRU_CH_CFG0_IE(0) in nxp_s32_mru_set_enabled()
/Zephyr-latest/drivers/dma/
Ddma_pl330.c119 static void dma_pl330_config_channel(struct dma_pl330_ch_config *ch_cfg, in dma_pl330_config_channel() argument
122 struct dma_pl330_ch_internal *ch_handle = &ch_cfg->internal; in dma_pl330_config_channel()
128 if (ch_cfg->src_addr_adj == DMA_ADDR_ADJ_INCREMENT) { in dma_pl330_config_channel()
132 if (ch_cfg->dst_addr_adj == DMA_ADDR_ADJ_INCREMENT) { in dma_pl330_config_channel()