| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_gicv3_priv.h | 69 #define GICR_IIDR_PRODUCT_ID_GET(_val) MASK_GET(_val, GICR_IIDR_PRODUCT_ID) argument
74 #define GICR_TYPER_AFFINITY_VALUE_GET(_val) MASK_GET(_val, GICR_TYPER_AFFINITY_VALUE) argument
77 #define GICR_TYPER_LAST_GET(_val) MASK_GET(_val, GICR_TYPER_LAST) argument
80 #define GICR_TYPER_PROCESSOR_NUMBER_GET(_val) MASK_GET(_val, GICR_TYPER_PROCESSOR_NUMBER) argument
140 #define GITS_CTLR_ENABLED_GET(_val) MASK_GET(_val, GITS_CTLR_ENABLED) argument
141 #define GITS_CTLR_QUIESCENT_GET(_val) MASK_GET(_val, GITS_CTLR_QUIESCENT) argument
165 #define GITS_TYPER_ITT_ENTRY_SIZE_GET(_val) MASK_GET(_val, GITS_TYPER_ITT_ENTRY_SIZE) argument
166 #define GITS_TYPER_PTA_GET(_val) MASK_GET(_val, GITS_TYPER_PTA) argument
167 #define GITS_TYPER_HCC_GET(_val) MASK_GET(_val, GITS_TYPER_HCC) argument
168 #define GITS_TYPER_DEVBITS_GET(_val) MASK_GET(_val, GITS_TYPER_DEVBITS) argument
[all …]
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| /Zephyr-latest/drivers/memc/ |
| D | memc_smartbond_nor_psram.c | 20 #define CLK_AMBA_REG_SET_FIELD(_field, _var, _val) \ argument
23 (((_val) << CRG_TOP_CLK_AMBA_REG_ ## _field ## _Pos) & \
26 #define QSPIC2_CTRLMODE_REG_SET_FIELD(_field, _var, _val) \ argument
29 (((_val) << QSPIC2_QSPIC2_CTRLMODE_REG_ ## _field ## _Pos) & \
32 #define QSPIC2_BURSTCMDA_REG_SET_FIELD(_field, _var, _val) \ argument
35 (((_val) << QSPIC2_QSPIC2_BURSTCMDA_REG_ ## _field ## _Pos) & \
38 #define QSPIC2_BURSTCMDB_REG_SET_FIELD(_field, _var, _val) \ argument
41 (((_val) << QSPIC2_QSPIC2_BURSTCMDB_REG_ ## _field ## _Pos) & \
44 #define QSPIC2_AWRITECMD_REG_SET_FIELD(_field, _var, _val) \ argument
47 (((_val) << QSPIC2_QSPIC2_AWRITECMD_REG_ ## _field ## _Pos) & \
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_e1000_priv.h | 106 #define iow32(_dev, _reg, _val) do { \ argument
107 LOG_DBG("iow32 %s 0x%08x", e1000_reg_to_string(_reg), (_val)); \
108 sys_write32(_val, (_dev)->address + (_reg)); \
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| /Zephyr-latest/tests/posix/single_process/src/ |
| D | env.c | 18 #define DEFINE_ENVIRON(_handle, _key, _val) char _handle[] = _key "=" _val argument
19 #define RESET_ENVIRON(_handle, _key, _val) \ argument
20 snprintf(_handle, ARRAY_SIZE(_handle), "%s=%s", _key, _val)
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| /Zephyr-latest/drivers/rtc/ |
| D | rtc_smartbond.c | 39 #define RTC_TIME_REG_SET_FIELD(_field, _var, _val) \ argument
43 (((_val) << RTC_RTC_TIME_REG_RTC_TIME_ ## _field ## _U_Pos) & \
47 #define RTC_CALENDAR_REG_SET_FIELD(_field, _var, _val) \ argument
51 (((_val) << RTC_RTC_CALENDAR_REG_RTC_CAL_ ## _field ## _U_Pos) & \
55 #define RTC_CALENDAR_ALARM_REG_SET_FIELD(_field, _var, _val) \ argument
59 (((_val) << RTC_RTC_CALENDAR_ALARM_REG_RTC_CAL_ ## _field ## _U_Pos) & \
63 #define RTC_TIME_ALARM_REG_SET_FIELD(_field, _var, _val) \ argument
67 (((_val) << RTC_RTC_TIME_ALARM_REG_RTC_TIME_ ## _field ## _U_Pos) & \
91 #define CLK_RTCDIV_REG_SET_FIELD(_field, _var, _val) \ argument
94 (((_val) << CRG_TOP_CLK_RTCDIV_REG_RTC_DIV_ ## _field ## _Pos) & \
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| /Zephyr-latest/tests/subsys/fs/common/ |
| D | test_fs_util.h | 189 #define TESTFS_BCMD_FILE(_n, _val, _sz) { \ argument
193 .value = _val, \
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_sifive.c | 45 #define SF_PWMSCALE(_val) (SF_PWMSCALEMASK & (_val)) argument
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| /Zephyr-latest/drivers/dma/ |
| D | dma_smartbond.c | 32 #define DMA_CTRL_REG_SET_FIELD(_field, _var, _val) \ argument
35 (((_val) << DMA_DMA0_CTRL_REG_ ## _field ## _Pos) & DMA_DMA0_CTRL_REG_ ## _field ## _Msk))
44 #define DMA_REQ_MUX_REG_SET(_idx, _val) \ argument
47 (((_val) & 0xf) << DMA_MUX_SHIFT((_idx)))
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| /Zephyr-latest/tests/drivers/input/kbd_matrix/src/ |
| D | main.c | 98 #define assert_new_event(_row, _col, _val) { \ argument
103 zassert_equal(_val, test_event_data.val); \
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| /Zephyr-latest/include/zephyr/zbus/ |
| D | zbus.h | 425 #define ZBUS_MSG_INIT(_val, ...) {_val, ##__VA_ARGS__} argument
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| /Zephyr-latest/tests/drivers/input/gpio_kbd_matrix/src/ |
| D | main.c | 190 #define assert_new_event(_row, _col, _val) { \ argument
195 zassert_equal(_val, test_event_data.val); \
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| /Zephyr-latest/drivers/display/ |
| D | display_renesas_lcdc.c | 41 #define LCDC_LAYER0_OFFSETX_REG_SET_FIELD(_field, _var, _val)\ argument
44 (((_val) << LCDC_LCDC_LAYER0_OFFSETX_REG_ ## _field ## _Pos) & \
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| /Zephyr-latest/drivers/crypto/ |
| D | crypto_smartbond.c | 36 #define CRYPTO_CTRL_REG_SET(_field, _val) \ argument
39 ((_val) << AES_HASH_CRYPTO_CTRL_REG_ ## _field ## _Pos)
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| /Zephyr-latest/drivers/mipi_dbi/ |
| D | mipi_dbi_smartbond.c | 52 #define LCDC_LAYER0_OFFSETX_REG_SET_FIELD(_field, _var, _val) \ argument
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| /Zephyr-latest/tests/kernel/timer/timer_api/src/ |
| D | timer_convert.c | 40 uint##prec##_t test_##src##_to_##dst##_##round##prec##_val = \
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| /Zephyr-latest/drivers/spi/ |
| D | spi_smartbond.c | 98 #define SPI_CTRL_REG_SET_FIELD(_field, _var, _val) \ argument
101 (((_val) << SPI_SPI_CTRL_REG_ ## _field ## _Pos) & SPI_SPI_CTRL_REG_ ## _field ## _Msk))
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| /Zephyr-latest/subsys/testsuite/include/zephyr/ |
| D | fff.h | 60 type arg##n##_val; \
72 memcpy((void *)&FUNCNAME##_fake.arg##n##_val, (void *)&arg##n, sizeof(arg##n));
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