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Searched refs:__IO (Results 1 – 8 of 8) sorted by relevance

/Zephyr-latest/drivers/ethernet/
Deth_smsc911x_priv.h39 #ifndef __IO
40 #define __IO macro
72 __IO uint32_t IRQ_CFG;
74 __IO uint32_t INT_STS;
76 __IO uint32_t INT_EN;
82 __IO uint32_t FIFO_INT;
84 __IO uint32_t RX_CFG;
86 __IO uint32_t TX_CFG;
88 __IO uint32_t HW_CFG;
90 __IO uint32_t RX_DP_CTRL;
[all …]
Deth_stm32_hal.c370 __IO ETH_DMADescTypeDef *dma_tx_desc; in eth_tx()
535 __IO ETH_DMADescTypeDef *last_dma_tx_desc = dma_tx_desc; in eth_tx()
594 __IO ETH_DMADescTypeDef *dma_rx_desc; in eth_rx()
646 __IO ETH_DMADescTypeDef *last_dma_rx_desc; in eth_rx()
/Zephyr-latest/drivers/fpga/
Dfpga_eos_s3.h14 __IO uint32_t CFG_CTL;
16 __IO uint32_t MAX_BL_CNT;
18 __IO uint32_t MAX_WL_CNT;
21 __IO uint32_t CFG_DATA;
/Zephyr-latest/drivers/i2c/
Di2c_omap.c34 __IO uint32_t SYSC; /**< System Configuration, offset: 0x10 */
36 __IO uint32_t IRQENABLE_SET; /**< Interrupt Enable Set, offset: 0x2C */
38 __IO uint32_t WE; /**< Wakeup Enable, offset: 0x34 */
40 __IO uint32_t IE; /**< Interrupt Enable (Legacy), offset: 0x84 */
41 __IO uint32_t STAT; /**< Status, offset: 0x88 */
43 __IO uint32_t SYSS; /**< System Status, offset: 0x90 */
44 __IO uint32_t BUF; /**< Buffer, offset: 0x94 */
45 __IO uint32_t CNT; /**< Data Count, offset: 0x98 */
46 __IO uint32_t DATA; /**< Data Access, offset: 0x9C */
48 __IO uint32_t CON; /**< Configuration, offset: 0xA4 */
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_mchp_xec.c21 ((__IO uint32_t *)(GPIO_PARIN_BASE + (config->port_num << 2)))
24 ((__IO uint32_t *)(GPIO_PAROUT_BASE + (config->port_num << 2)))
45 __IO uint32_t *pcr1_base;
66 __IO uint32_t *current_pcr1; in gpio_xec_configure()
167 __IO uint32_t *current_pcr1; in gpio_xec_pin_interrupt_configure()
250 __IO uint32_t *gpio_base = GPIO_OUT_BASE(config); in gpio_xec_port_set_masked_raw()
262 __IO uint32_t *gpio_base = GPIO_OUT_BASE(config); in gpio_xec_port_set_bits_raw()
275 __IO uint32_t *gpio_base = GPIO_OUT_BASE(config); in gpio_xec_port_clear_bits_raw()
287 __IO uint32_t *gpio_base = GPIO_OUT_BASE(config); in gpio_xec_port_toggle_bits()
299 __IO uint32_t *gpio_base = GPIO_IN_BASE(config); in gpio_xec_port_get_raw()
/Zephyr-latest/soc/st/stm32/common/
Dstm32cube_hal.c34 void HAL_Delay(__IO uint32_t Delay) in HAL_Delay()
/Zephyr-latest/drivers/eeprom/
Deeprom_stm32.c43 *pbuf = *(__IO uint8_t*)(config->addr + offset); in eeprom_stm32_read()
/Zephyr-latest/drivers/dma/
Ddma_smartbond.c135 __IO uint32_t DMA_A_START;
136 __IO uint32_t DMA_B_START;
137 __IO uint32_t DMA_INT_REG;
138 __IO uint32_t DMA_LEN_REG;
139 __IO uint32_t DMA_CTRL_REG;