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Searched refs:XTTCPS_MATCH_0_OFFSET (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/timer/
Dxlnx_psttc_timer.c72 sys_write32(match, TIMER_BASE_ADDR + XTTCPS_MATCH_0_OFFSET); in update_match()
167 sys_write32(0, TIMER_BASE_ADDR + XTTCPS_MATCH_0_OFFSET); in sys_clock_driver_init()
186 sys_write32(reg_val, TIMER_BASE_ADDR + XTTCPS_MATCH_0_OFFSET); in sys_clock_driver_init()
Dxlnx_psttc_timer_priv.h29 #define XTTCPS_MATCH_0_OFFSET 0x00000030U macro