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Searched refs:XTTCPS_CNT_CNTRL_OFFSET (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/timer/
Dxlnx_psttc_timer.c155 TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
164 TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
174 reg_val = sys_read32(TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
176 sys_write32(reg_val, TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
179 reg_val = sys_read32(TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
181 sys_write32(reg_val, TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
198 reg_val = sys_read32(TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
200 sys_write32(reg_val, TIMER_BASE_ADDR + XTTCPS_CNT_CNTRL_OFFSET); in sys_clock_driver_init()
Dxlnx_psttc_timer_priv.h23 #define XTTCPS_CNT_CNTRL_OFFSET 0x0000000CU macro