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Searched refs:XTENSA_MPU_ACCESS_P_RW_U_RO (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/arch/xtensa/
Dmpu.h62 #define XTENSA_MPU_ACCESS_P_RW_U_RO (10) macro
232 case XTENSA_MPU_ACCESS_P_RW_U_RO: in xtensa_mem_partition_is_writable()
/Zephyr-latest/arch/xtensa/core/
Dmpu.c812 case XTENSA_MPU_ACCESS_P_RW_U_RO: in arch_mem_domain_partition_remove()
1057 case XTENSA_MPU_ACCESS_P_RW_U_RO: in arch_buffer_validate()
1119 case XTENSA_MPU_ACCESS_P_RW_U_RO: in xtensa_mem_kernel_has_access()
1145 case XTENSA_MPU_ACCESS_P_RW_U_RO: in xtensa_mem_kernel_has_access()