Searched refs:XILINX_AXI_DMA_TX_CHANNEL_NUM (Results 1 – 2 of 2) sorted by relevance
13 #define XILINX_AXI_DMA_TX_CHANNEL_NUM 0 macro
517 XILINX_AXI_DMA_TX_CHANNEL_NUM, retval); in dma_xilinx_axi_dma_clean_up_sg_descriptors()542 &data->channels[XILINX_AXI_DMA_TX_CHANNEL_NUM]; in dma_xilinx_axi_dma_tx_isr()605 channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? "TX" : "RX"); in dma_xilinx_axi_dma_start()615 channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? "TX" : "RX", tail_descriptor, in dma_xilinx_axi_dma_start()836 cfg, channel, channel_data, channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? src : dst, in dma_xilinx_axi_dma_config_reload()907 if (channel == XILINX_AXI_DMA_TX_CHANNEL_NUM && in dma_xilinx_axi_dma_configure()924 (channel == XILINX_AXI_DMA_TX_CHANNEL_NUM) ? dma_xilinx_axi_dma_tx_isr in dma_xilinx_axi_dma_configure()931 if (channel == XILINX_AXI_DMA_TX_CHANNEL_NUM) { in dma_xilinx_axi_dma_configure()959 channel == XILINX_AXI_DMA_TX_CHANNEL_NUM ? "TX" : "RX"); in dma_xilinx_axi_dma_configure()1001 if (channel == XILINX_AXI_DMA_TX_CHANNEL_NUM) { in dma_xilinx_axi_dma_configure()[all …]
