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Searched refs:XGMAC_DMA_BASE_ADDR_OFFSET (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/drivers/mdio/
Dmdio_dwcxgmac.c19 #define XGMAC_DMA_BASE_ADDR_OFFSET (0x3000u) macro
61 mem_addr_t reg_addr = (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_MODE_OFST); in dwxgmac_software_reset()
/Zephyr-latest/drivers/ethernet/dwc_xgmac/
Deth_dwc_xgmac.c155 (mem_addr_t)(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_SYSBUS_MODE_OFST); in dwxgmac_dma_init()
177 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_TX_EDMA_CONTROL_OFST; in dwxgmac_dma_init()
184 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_RX_EDMA_CONTROL_OFST; in dwxgmac_dma_init()
531 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_MODE_OFST; in dwxgmac_irq_init()
886 sys_read32(ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_INTERRUPT_STATUS_OFST); in eth_dwc_xgmac_isr()
912 reg_addr = ioaddr + XGMAC_DMA_BASE_ADDR_OFFSET + DMA_INTERRUPT_STATUS_OFST; in eth_dwc_xgmac_isr()
Deth_dwc_xgmac_priv.h28 #define XGMAC_DMA_BASE_ADDR_OFFSET (0x3000u) macro