Searched refs:VTOR (Results 1 – 13 of 13) sorted by relevance
| /Zephyr-latest/arch/arm/core/ |
| D | vector_table.ld | 9 * In an MCU with VTOR, the VTOR.TBLOFF is set to the start address of the
11 * exc_vector_table must respect the alignment requirements of VTOR.TBLOFF
16 /* VTOR bits 0:7 are reserved (RES0). This requires that the base address
21 /* VTOR bits 0:6 are reserved (RES0). This requires that the base address
29 /* When setting TBLOFF in VTOR we must align the offset to the number of
33 * to the next power of two; this restriction guarantees a functional VTOR
43 * For AArch32 (M), VTOR has Bits [6:0] = RES0. Thus, vector start address
45 * VBAR and VTOR ie Bits [6:0] = 0.
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | relay_vector_table.ld | 9 * In an MCU with VTOR, the VTOR.TBLOFF is set to the start address of the
12 * of VTOR.TBLOFF described below.
15 /* VTOR bits 0:6 are reserved (RES0). This requires that the base address
20 /* When setting TBLOFF in VTOR we must align the offset to the number of
24 * to the next power of two; this restriction guarantees a functional VTOR
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| D | prep_c.c | 56 SCB->VTOR = VECTOR_ADDRESS & VTOR_MASK; in relocate_vector_table()
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| D | CMakeLists.txt | 46 # required for CPUs without VTOR, which need to have the exception vector
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| D | Kconfig | 136 This option signifies the CPU has the VTOR register.
137 The VTOR indicates the offset of the vector table base
357 with no hardware vector table relocation mechanisms (e.g. VTOR).
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| /Zephyr-latest/soc/nordic/nrf54h/ |
| D | pm_s2ram.c | 45 uint32_t VTOR; member
130 backup->VTOR = SCB->VTOR; in scb_suspend()
147 SCB->VTOR = backup->VTOR; in scb_resume()
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| /Zephyr-latest/soc/nxp/lpc/lpc51u68/ |
| D | linker.ld | 7 /* The SDK CMIS SystemInit function sets VTOR equal to &__Vectors,
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| /Zephyr-latest/soc/nxp/lpc/lpc55xxx/ |
| D | linker.ld | 14 /* The SDK CMIS SystemInit function sets VTOR equal to &__Vectors,
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| /Zephyr-latest/soc/nxp/lpc/lpc54xxx/ |
| D | linker.ld | 14 /* The SDK CMIS SystemInit function sets VTOR equal to &__Vectors,
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| /Zephyr-latest/tests/arch/arm/arm_sw_vector_relay/src/ |
| D | arm_sw_vector_relay.c | 53 zassert_true(SCB->VTOR == (uint32_t)_vector_start, in ZTEST()
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| /Zephyr-latest/soc/st/stm32/stm32wb0x/ |
| D | soc.c | 168 RAM_VR.AppBase = SCB->VTOR; in soc_early_init_hook()
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| /Zephyr-latest/boards/arm/mps2/ |
| D | board.cmake | 20 -C armcortexm0plusct.VTOR=1
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| /Zephyr-latest/doc/hardware/arch/ |
| D | arm_cortex_m.rst | 587 In Cortex-M platforms that implement the VTOR register (see :kconfig:option:`CONFIG_CPU_CORTEX_M_HA…
588 chain-loadable images relocate the Cortex-M vector table by updating the VTOR register with the off…
591 Baseline Cortex-M platforms without VTOR register might not be able to relocate their
604 While this feature is intended for processors without VTOR register, it
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