1 /*
2 * Copyright (c) 2022 Renesas Electronics Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT renesas_smartbond_uart
8
9 #include <errno.h>
10 #include <zephyr/drivers/gpio.h>
11 #include <zephyr/drivers/uart.h>
12 #include <zephyr/drivers/pinctrl.h>
13 #include <zephyr/pm/device.h>
14 #include <zephyr/pm/policy.h>
15 #include <zephyr/pm/device_runtime.h>
16 #include <zephyr/kernel.h>
17 #include <zephyr/spinlock.h>
18 #include <zephyr/sys/byteorder.h>
19 #include <DA1469xAB.h>
20 #include <zephyr/irq.h>
21 #include <da1469x_pd.h>
22
23 #define IIR_NO_INTR 1
24 #define IIR_THR_EMPTY 2
25 #define IIR_RX_DATA 4
26 #define IIR_LINE_STATUS 5
27 #define IIR_BUSY 7
28 #define IIR_TIMEOUT 12
29
30 #define STOP_BITS_1 0
31 #define STOP_BITS_2 1
32
33 #define DATA_BITS_5 0
34 #define DATA_BITS_6 1
35 #define DATA_BITS_7 2
36 #define DATA_BITS_8 3
37
38 #define RX_FIFO_TRIG_1_CHAR 0
39 #define RX_FIFO_TRIG_1_4_FULL 1
40 #define RX_FIFO_TRIG_1_2_FULL 2
41 #define RX_FIFO_TRIG_MINUS_2_CHARS 3
42
43 #define TX_FIFO_TRIG_EMPTY 0
44 #define TX_FIFO_TRIG_2_CHARS 1
45 #define TX_FIFO_TRIG_1_4_FULL 2
46 #define TX_FIFO_TRIG_1_2_FULL 3
47
48 #define BAUDRATE_CFG_DLH(cfg) (((cfg) >> 16) & 0xff)
49 #define BAUDRATE_CFG_DLL(cfg) (((cfg) >> 8) & 0xff)
50 #define BAUDRATE_CFG_DLF(cfg) ((cfg) & 0xff)
51
52 struct uart_smartbond_baudrate_cfg {
53 uint32_t baudrate;
54 /* DLH=cfg[23:16] DLL=cfg[15:8] DLF=cfg[7:0] */
55 uint32_t cfg;
56 };
57
58 static const struct uart_smartbond_baudrate_cfg uart_smartbond_baudrate_table[] = {
59 { 2000000, 0x00000100 },
60 { 1000000, 0x00000200 },
61 { 921600, 0x00000203 },
62 { 500000, 0x00000400 },
63 { 230400, 0x0000080b },
64 { 115200, 0x00001106 },
65 { 57600, 0x0000220c },
66 { 38400, 0x00003401 },
67 { 28800, 0x00004507 },
68 { 19200, 0x00006803 },
69 { 14400, 0x00008a0e },
70 { 9600, 0x0000d005 },
71 { 4800, 0x0001a00b },
72 };
73
74 struct uart_smartbond_cfg {
75 UART2_Type *regs;
76 int periph_clock_config;
77 const struct pinctrl_dev_config *pcfg;
78 bool hw_flow_control_supported;
79
80 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
81 void (*irq_config_func)(const struct device *dev);
82 #endif
83 #if CONFIG_PM_DEVICE
84 int rx_wake_timeout;
85 struct gpio_dt_spec rx_wake_gpio;
86 struct gpio_dt_spec dtr_gpio;
87 #endif
88 };
89
90 struct uart_smartbond_runtime_cfg {
91 uint32_t baudrate_cfg;
92 uint32_t lcr_reg_val;
93 uint8_t mcr_reg_val;
94 uint8_t ier_reg_val;
95 };
96
97 struct uart_smartbond_data {
98 struct uart_config current_config;
99 struct uart_smartbond_runtime_cfg runtime_cfg;
100 struct k_spinlock lock;
101 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
102 uart_irq_callback_user_data_t callback;
103 void *cb_data;
104 uint32_t flags;
105 uint8_t rx_enabled;
106 uint8_t tx_enabled;
107 #if CONFIG_PM_DEVICE
108 struct gpio_callback dtr_wake_cb;
109 const struct device *dev;
110 struct gpio_callback rx_wake_cb;
111 int rx_wake_timeout;
112 struct k_work_delayable rx_timeout_work;
113 #endif
114 #endif
115 };
116
117 #ifdef CONFIG_PM_DEVICE
uart_smartbond_pm_prevent_system_sleep(void)118 static inline void uart_smartbond_pm_prevent_system_sleep(void)
119 {
120 pm_policy_state_lock_get(PM_STATE_STANDBY, PM_ALL_SUBSTATES);
121 }
122
uart_smartbond_pm_allow_system_sleep(void)123 static inline void uart_smartbond_pm_allow_system_sleep(void)
124 {
125 pm_policy_state_lock_put(PM_STATE_STANDBY, PM_ALL_SUBSTATES);
126 }
127
uart_smartbond_pm_policy_state_lock_get(const struct device * dev)128 static void uart_smartbond_pm_policy_state_lock_get(const struct device *dev)
129 {
130 #ifdef CONFIG_PM_DEVICE_RUNTIME
131 pm_device_runtime_get(dev);
132 #else
133 ARG_UNUSED(dev);
134 uart_smartbond_pm_prevent_system_sleep();
135 #endif
136 }
137
uart_smartbond_pm_policy_state_lock_put(const struct device * dev)138 static void uart_smartbond_pm_policy_state_lock_put(const struct device *dev)
139 {
140 #ifdef CONFIG_PM_DEVICE_RUNTIME
141 pm_device_runtime_put(dev);
142 #else
143 ARG_UNUSED(dev);
144 uart_smartbond_pm_allow_system_sleep();
145 #endif
146 }
147
uart_smartbond_rx_refresh_timeout(struct k_work * work)148 static void uart_smartbond_rx_refresh_timeout(struct k_work *work)
149 {
150 struct uart_smartbond_data *data = CONTAINER_OF(work, struct uart_smartbond_data,
151 rx_timeout_work.work);
152
153 uart_smartbond_pm_policy_state_lock_put(data->dev);
154 }
155 #endif
156
uart_smartbond_poll_in(const struct device * dev,unsigned char * p_char)157 static int uart_smartbond_poll_in(const struct device *dev, unsigned char *p_char)
158 {
159 const struct uart_smartbond_cfg *config = dev->config;
160 struct uart_smartbond_data *data = dev->data;
161 k_spinlock_key_t key = k_spin_lock(&data->lock);
162
163 pm_device_runtime_get(dev);
164
165 if ((config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_RFNE_Msk) == 0) {
166 pm_device_runtime_put(dev);
167 k_spin_unlock(&data->lock, key);
168 return -1;
169 }
170
171 *p_char = config->regs->UART2_RBR_THR_DLL_REG;
172
173 pm_device_runtime_put(dev);
174 k_spin_unlock(&data->lock, key);
175
176 return 0;
177 }
178
uart_smartbond_poll_out(const struct device * dev,unsigned char out_char)179 static void uart_smartbond_poll_out(const struct device *dev, unsigned char out_char)
180 {
181 const struct uart_smartbond_cfg *config = dev->config;
182 struct uart_smartbond_data *data = dev->data;
183 k_spinlock_key_t key = k_spin_lock(&data->lock);
184
185 pm_device_runtime_get(dev);
186
187 while (!(config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_TFNF_Msk)) {
188 /* Wait until FIFO has free space */
189 }
190
191 config->regs->UART2_RBR_THR_DLL_REG = out_char;
192
193 pm_device_runtime_put(dev);
194
195 k_spin_unlock(&data->lock, key);
196 }
197
apply_runtime_config(const struct device * dev)198 static void apply_runtime_config(const struct device *dev)
199 {
200 const struct uart_smartbond_cfg *config = dev->config;
201 struct uart_smartbond_data *data = dev->data;
202 k_spinlock_key_t key;
203
204 key = k_spin_lock(&data->lock);
205
206 CRG_COM->SET_CLK_COM_REG = config->periph_clock_config;
207
208 config->regs->UART2_MCR_REG = data->runtime_cfg.mcr_reg_val;
209 config->regs->UART2_SRR_REG = UART2_UART2_SRR_REG_UART_UR_Msk |
210 UART2_UART2_SRR_REG_UART_RFR_Msk |
211 UART2_UART2_SRR_REG_UART_XFR_Msk;
212
213 /* Configure baudrate */
214 config->regs->UART2_LCR_REG |= UART2_UART2_LCR_REG_UART_DLAB_Msk;
215 config->regs->UART2_IER_DLH_REG = BAUDRATE_CFG_DLH(data->runtime_cfg.baudrate_cfg);
216 config->regs->UART2_RBR_THR_DLL_REG = BAUDRATE_CFG_DLL(data->runtime_cfg.baudrate_cfg);
217 config->regs->UART2_DLF_REG = BAUDRATE_CFG_DLF(data->runtime_cfg.baudrate_cfg);
218 config->regs->UART2_LCR_REG &= ~UART2_UART2_LCR_REG_UART_DLAB_Msk;
219
220 /* Configure frame */
221 config->regs->UART2_LCR_REG = data->runtime_cfg.lcr_reg_val;
222
223 /* Enable hardware FIFO */
224 config->regs->UART2_SFE_REG = UART2_UART2_SFE_REG_UART_SHADOW_FIFO_ENABLE_Msk;
225
226 config->regs->UART2_SRT_REG = RX_FIFO_TRIG_1_CHAR;
227 config->regs->UART2_STET_REG = TX_FIFO_TRIG_1_2_FULL;
228 config->regs->UART2_IER_DLH_REG = data->runtime_cfg.ier_reg_val;
229
230 k_spin_unlock(&data->lock, key);
231 }
232
uart_smartbond_configure(const struct device * dev,const struct uart_config * cfg)233 static int uart_smartbond_configure(const struct device *dev,
234 const struct uart_config *cfg)
235 {
236 const struct uart_smartbond_cfg *config = dev->config;
237 struct uart_smartbond_data *data = dev->data;
238 uint32_t baudrate_cfg = 0;
239 uint32_t lcr_reg_val;
240 int err;
241 int i;
242
243 if ((cfg->parity != UART_CFG_PARITY_NONE && cfg->parity != UART_CFG_PARITY_ODD &&
244 cfg->parity != UART_CFG_PARITY_EVEN) ||
245 (cfg->stop_bits != UART_CFG_STOP_BITS_1 && cfg->stop_bits != UART_CFG_STOP_BITS_2) ||
246 (cfg->data_bits != UART_CFG_DATA_BITS_5 && cfg->data_bits != UART_CFG_DATA_BITS_6 &&
247 cfg->data_bits != UART_CFG_DATA_BITS_7 && cfg->data_bits != UART_CFG_DATA_BITS_8) ||
248 (cfg->flow_ctrl != UART_CFG_FLOW_CTRL_NONE &&
249 cfg->flow_ctrl != UART_CFG_FLOW_CTRL_RTS_CTS)) {
250 return -ENOTSUP;
251 }
252
253 /* Flow control is not supported on UART */
254 if (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_RTS_CTS &&
255 !config->hw_flow_control_supported) {
256 return -ENOTSUP;
257 }
258
259 /* Lookup configuration for baudrate */
260 for (i = 0; i < ARRAY_SIZE(uart_smartbond_baudrate_table); i++) {
261 if (uart_smartbond_baudrate_table[i].baudrate == cfg->baudrate) {
262 baudrate_cfg = uart_smartbond_baudrate_table[i].cfg;
263 break;
264 }
265 }
266
267 if (baudrate_cfg == 0) {
268 return -ENOTSUP;
269 }
270
271 /* Calculate frame configuration register value */
272 lcr_reg_val = 0;
273
274 switch (cfg->parity) {
275 case UART_CFG_PARITY_NONE:
276 break;
277 case UART_CFG_PARITY_EVEN:
278 lcr_reg_val |= UART2_UART2_LCR_REG_UART_EPS_Msk;
279 /* no break */
280 case UART_CFG_PARITY_ODD:
281 lcr_reg_val |= UART2_UART2_LCR_REG_UART_PEN_Msk;
282 break;
283 }
284
285 if (cfg->stop_bits == UART_CFG_STOP_BITS_2) {
286 lcr_reg_val |= STOP_BITS_2 << UART2_UART2_LCR_REG_UART_STOP_Pos;
287 }
288
289 switch (cfg->data_bits) {
290 case UART_CFG_DATA_BITS_6:
291 lcr_reg_val |= DATA_BITS_6 << UART2_UART2_LCR_REG_UART_DLS_Pos;
292 break;
293 case UART_CFG_DATA_BITS_7:
294 lcr_reg_val |= DATA_BITS_7 << UART2_UART2_LCR_REG_UART_DLS_Pos;
295 break;
296 case UART_CFG_DATA_BITS_8:
297 lcr_reg_val |= DATA_BITS_8 << UART2_UART2_LCR_REG_UART_DLS_Pos;
298 break;
299 }
300
301 data->runtime_cfg.baudrate_cfg = baudrate_cfg;
302 data->runtime_cfg.lcr_reg_val = lcr_reg_val;
303 data->runtime_cfg.mcr_reg_val = cfg->flow_ctrl ? UART2_UART2_MCR_REG_UART_AFCE_Msk : 0;
304
305 pm_device_runtime_get(dev);
306 apply_runtime_config(dev);
307 pm_device_runtime_put(dev);
308
309 data->current_config = *cfg;
310
311 err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
312 if (err < 0) {
313 return err;
314 }
315
316 return 0;
317 }
318
319 #ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
uart_smartbond_config_get(const struct device * dev,struct uart_config * cfg)320 static int uart_smartbond_config_get(const struct device *dev,
321 struct uart_config *cfg)
322 {
323 struct uart_smartbond_data *data = dev->data;
324
325 *cfg = data->current_config;
326
327 return 0;
328 }
329 #endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */
330
331 #if CONFIG_PM_DEVICE
332
uart_smartbond_wake_handler(const struct device * gpio,struct gpio_callback * cb,uint32_t pins)333 static void uart_smartbond_wake_handler(const struct device *gpio, struct gpio_callback *cb,
334 uint32_t pins)
335 {
336 struct uart_smartbond_data *data = CONTAINER_OF(cb, struct uart_smartbond_data,
337 rx_wake_cb);
338
339 /* Disable interrupts on UART RX pin to avoid repeated interrupts. */
340 (void)gpio_pin_interrupt_configure(gpio, (find_msb_set(pins) - 1),
341 GPIO_INT_DISABLE);
342 /* Refresh console expired time */
343 if (data->rx_wake_timeout) {
344 uart_smartbond_pm_policy_state_lock_get(data->dev);
345 k_work_reschedule(&data->rx_timeout_work, K_MSEC(data->rx_wake_timeout));
346 }
347 }
348
uart_smartbond_dtr_handler(const struct device * gpio,struct gpio_callback * cb,uint32_t pins)349 static void uart_smartbond_dtr_handler(const struct device *gpio, struct gpio_callback *cb,
350 uint32_t pins)
351 {
352 struct uart_smartbond_data *data = CONTAINER_OF(cb, struct uart_smartbond_data,
353 dtr_wake_cb);
354 int pin = find_lsb_set(pins) - 1;
355
356 if (gpio_pin_get(gpio, pin) == 1) {
357 uart_smartbond_pm_policy_state_lock_put(data->dev);
358 } else {
359 uart_smartbond_pm_policy_state_lock_get(data->dev);
360 }
361 }
362
363 #endif
364
uart_smartbond_init(const struct device * dev)365 static int uart_smartbond_init(const struct device *dev)
366 {
367 struct uart_smartbond_data *data = dev->data;
368 int ret = 0;
369
370 #ifdef CONFIG_PM_DEVICE_RUNTIME
371 /* Make sure device state is marked as suspended */
372 pm_device_init_suspended(dev);
373
374 ret = pm_device_runtime_enable(dev);
375 #else
376 da1469x_pd_acquire(MCU_PD_DOMAIN_COM);
377 #endif
378
379 #ifdef CONFIG_PM_DEVICE
380 int rx_wake_timeout;
381 const struct uart_smartbond_cfg *config = dev->config;
382 const struct device *uart_console_dev =
383 DEVICE_DT_GET(DT_CHOSEN(zephyr_console));
384 data->dev = dev;
385 /* All uarts can have wake time specified in device tree to keep
386 * device awake after receiving data
387 */
388 rx_wake_timeout = config->rx_wake_timeout;
389 if (dev == uart_console_dev) {
390 #ifdef CONFIG_UART_CONSOLE_INPUT_EXPIRED
391 /* For device configured as console wake time is taken from
392 * Kconfig same way it is configured for other platforms
393 */
394 rx_wake_timeout = CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT;
395 #endif
396 }
397 /* If DTR pin is configured, use it for power management */
398 if (config->dtr_gpio.port != NULL) {
399 gpio_init_callback(&data->dtr_wake_cb, uart_smartbond_dtr_handler,
400 BIT(config->dtr_gpio.pin));
401 ret = gpio_add_callback(config->dtr_gpio.port, &data->dtr_wake_cb);
402 if (ret == 0) {
403 ret = gpio_pin_interrupt_configure_dt(&config->dtr_gpio,
404 GPIO_INT_MODE_EDGE |
405 GPIO_INT_TRIG_BOTH);
406 /* Check if DTR is already active (low), if so lock power state */
407 if (gpio_pin_get(config->dtr_gpio.port, config->dtr_gpio.pin) == 0) {
408 uart_smartbond_pm_policy_state_lock_get(dev);
409 }
410 }
411 }
412 if (rx_wake_timeout > 0 && config->rx_wake_gpio.port != NULL) {
413 k_work_init_delayable(&data->rx_timeout_work,
414 uart_smartbond_rx_refresh_timeout);
415 gpio_init_callback(&data->rx_wake_cb, uart_smartbond_wake_handler,
416 BIT(config->rx_wake_gpio.pin));
417
418 ret = gpio_add_callback(config->rx_wake_gpio.port, &data->rx_wake_cb);
419 if (ret == 0) {
420 data->rx_wake_timeout = rx_wake_timeout;
421 }
422 }
423 #endif
424
425 ret = uart_smartbond_configure(dev, &data->current_config);
426 #ifndef CONFIG_PM_DEVICE_RUNTIME
427 if (ret < 0) {
428 da1469x_pd_release(MCU_PD_DOMAIN_COM);
429 }
430 #endif
431
432 return ret;
433 }
434
435 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
irq_tx_enable(const struct device * dev)436 static inline void irq_tx_enable(const struct device *dev)
437 {
438 const struct uart_smartbond_cfg *config = dev->config;
439 struct uart_smartbond_data *data = dev->data;
440
441 config->regs->UART2_IER_DLH_REG |= UART2_UART2_IER_DLH_REG_PTIME_DLH7_Msk |
442 UART2_UART2_IER_DLH_REG_ETBEI_DLH1_Msk;
443 data->runtime_cfg.ier_reg_val = config->regs->UART2_IER_DLH_REG;
444 }
445
irq_tx_disable(const struct device * dev)446 static inline void irq_tx_disable(const struct device *dev)
447 {
448 const struct uart_smartbond_cfg *config = dev->config;
449 struct uart_smartbond_data *data = dev->data;
450
451 config->regs->UART2_IER_DLH_REG &= ~(UART2_UART2_IER_DLH_REG_PTIME_DLH7_Msk |
452 UART2_UART2_IER_DLH_REG_ETBEI_DLH1_Msk);
453 data->runtime_cfg.ier_reg_val = config->regs->UART2_IER_DLH_REG;
454 }
455
irq_rx_enable(const struct device * dev)456 static inline void irq_rx_enable(const struct device *dev)
457 {
458 const struct uart_smartbond_cfg *config = dev->config;
459 struct uart_smartbond_data *data = dev->data;
460
461 config->regs->UART2_IER_DLH_REG |= UART2_UART2_IER_DLH_REG_ERBFI_DLH0_Msk;
462 data->runtime_cfg.ier_reg_val = config->regs->UART2_IER_DLH_REG;
463 }
464
irq_rx_disable(const struct device * dev)465 static inline void irq_rx_disable(const struct device *dev)
466 {
467 const struct uart_smartbond_cfg *config = dev->config;
468 struct uart_smartbond_data *data = dev->data;
469
470 config->regs->UART2_IER_DLH_REG &= ~UART2_UART2_IER_DLH_REG_ERBFI_DLH0_Msk;
471 data->runtime_cfg.ier_reg_val = config->regs->UART2_IER_DLH_REG;
472 }
473
uart_smartbond_fifo_fill(const struct device * dev,const uint8_t * tx_data,int len)474 static int uart_smartbond_fifo_fill(const struct device *dev,
475 const uint8_t *tx_data,
476 int len)
477 {
478 const struct uart_smartbond_cfg *config = dev->config;
479 struct uart_smartbond_data *data = dev->data;
480 int num_tx = 0;
481 k_spinlock_key_t key = k_spin_lock(&data->lock);
482
483 pm_device_runtime_get(dev);
484 while ((len - num_tx > 0) &&
485 (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_TFNF_Msk)) {
486 config->regs->UART2_RBR_THR_DLL_REG = tx_data[num_tx++];
487 }
488
489 if (data->tx_enabled) {
490 irq_tx_enable(dev);
491 }
492
493 pm_device_runtime_put(dev);
494 k_spin_unlock(&data->lock, key);
495
496 return num_tx;
497 }
498
uart_smartbond_fifo_read(const struct device * dev,uint8_t * rx_data,const int size)499 static int uart_smartbond_fifo_read(const struct device *dev, uint8_t *rx_data,
500 const int size)
501 {
502 const struct uart_smartbond_cfg *config = dev->config;
503 struct uart_smartbond_data *data = dev->data;
504 int num_rx = 0;
505 k_spinlock_key_t key = k_spin_lock(&data->lock);
506
507 pm_device_runtime_get(dev);
508 while ((size - num_rx > 0) &&
509 (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_RFNE_Msk)) {
510 rx_data[num_rx++] = config->regs->UART2_RBR_THR_DLL_REG;
511 }
512
513 if (data->rx_enabled) {
514 irq_rx_enable(dev);
515 }
516
517 #ifdef CONFIG_PM_DEVICE
518 if (data->rx_wake_timeout) {
519 k_work_reschedule(&data->rx_timeout_work, K_MSEC(data->rx_wake_timeout));
520 }
521 #endif
522
523 pm_device_runtime_put(dev);
524 k_spin_unlock(&data->lock, key);
525
526 return num_rx;
527 }
528
uart_smartbond_irq_tx_enable(const struct device * dev)529 static void uart_smartbond_irq_tx_enable(const struct device *dev)
530 {
531 struct uart_smartbond_data *data = dev->data;
532 k_spinlock_key_t key = k_spin_lock(&data->lock);
533
534 data->tx_enabled = 1;
535 irq_tx_enable(dev);
536
537 k_spin_unlock(&data->lock, key);
538 }
539
uart_smartbond_irq_tx_disable(const struct device * dev)540 static void uart_smartbond_irq_tx_disable(const struct device *dev)
541 {
542 struct uart_smartbond_data *data = dev->data;
543 k_spinlock_key_t key = k_spin_lock(&data->lock);
544
545 irq_tx_disable(dev);
546 data->tx_enabled = 0;
547
548 k_spin_unlock(&data->lock, key);
549 }
550
uart_smartbond_irq_tx_ready(const struct device * dev)551 static int uart_smartbond_irq_tx_ready(const struct device *dev)
552 {
553 const struct uart_smartbond_cfg *config = dev->config;
554
555 bool ret = (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_TFNF_Msk) != 0;
556
557 return ret;
558 }
559
uart_smartbond_irq_rx_enable(const struct device * dev)560 static void uart_smartbond_irq_rx_enable(const struct device *dev)
561 {
562 struct uart_smartbond_data *data = dev->data;
563 k_spinlock_key_t key = k_spin_lock(&data->lock);
564
565 data->rx_enabled = 1;
566 irq_rx_enable(dev);
567
568 k_spin_unlock(&data->lock, key);
569 }
570
uart_smartbond_irq_rx_disable(const struct device * dev)571 static void uart_smartbond_irq_rx_disable(const struct device *dev)
572 {
573 struct uart_smartbond_data *data = dev->data;
574 k_spinlock_key_t key = k_spin_lock(&data->lock);
575
576 irq_rx_disable(dev);
577 data->rx_enabled = 0;
578
579 k_spin_unlock(&data->lock, key);
580 }
581
uart_smartbond_irq_tx_complete(const struct device * dev)582 static int uart_smartbond_irq_tx_complete(const struct device *dev)
583 {
584 const struct uart_smartbond_cfg *config = dev->config;
585
586 bool ret = (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_TFE_Msk) != 0;
587
588 return ret;
589 }
590
uart_smartbond_irq_rx_ready(const struct device * dev)591 static int uart_smartbond_irq_rx_ready(const struct device *dev)
592 {
593 const struct uart_smartbond_cfg *config = dev->config;
594
595 bool ret = (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_RFNE_Msk) != 0;
596
597 return ret;
598 }
599
uart_smartbond_irq_err_enable(const struct device * dev)600 static void uart_smartbond_irq_err_enable(const struct device *dev)
601 {
602 k_panic();
603 }
604
uart_smartbond_irq_err_disable(const struct device * dev)605 static void uart_smartbond_irq_err_disable(const struct device *dev)
606 {
607 k_panic();
608 }
609
uart_smartbond_irq_is_pending(const struct device * dev)610 static int uart_smartbond_irq_is_pending(const struct device *dev)
611 {
612 k_panic();
613
614 return 0;
615 }
616
uart_smartbond_irq_update(const struct device * dev)617 static int uart_smartbond_irq_update(const struct device *dev)
618 {
619 const struct uart_smartbond_cfg *config = dev->config;
620 bool no_intr = false;
621
622 while (!no_intr) {
623 switch (config->regs->UART2_IIR_FCR_REG & 0x0F) {
624 case IIR_NO_INTR:
625 no_intr = true;
626 break;
627 case IIR_THR_EMPTY:
628 irq_tx_disable(dev);
629 break;
630 case IIR_RX_DATA:
631 irq_rx_disable(dev);
632 break;
633 case IIR_LINE_STATUS:
634 case IIR_TIMEOUT:
635 /* ignore */
636 break;
637 case IIR_BUSY:
638 /* busy detect */
639 /* fall-through */
640 default:
641 k_panic();
642 break;
643 }
644 }
645
646 return 1;
647 }
648
uart_smartbond_irq_callback_set(const struct device * dev,uart_irq_callback_user_data_t cb,void * cb_data)649 static void uart_smartbond_irq_callback_set(const struct device *dev,
650 uart_irq_callback_user_data_t cb,
651 void *cb_data)
652 {
653 struct uart_smartbond_data *data = dev->data;
654
655 data->callback = cb;
656 data->cb_data = cb_data;
657 }
658
uart_smartbond_isr(const struct device * dev)659 static void uart_smartbond_isr(const struct device *dev)
660 {
661 struct uart_smartbond_data *data = dev->data;
662
663 if (data->callback) {
664 data->callback(dev, data->cb_data);
665 }
666 }
667 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
668
669 #ifdef CONFIG_PM_DEVICE
uart_disable(const struct device * dev)670 static int uart_disable(const struct device *dev)
671 {
672 const struct uart_smartbond_cfg *config = dev->config;
673 struct uart_smartbond_data *data = dev->data;
674
675 /* Store IER register in case UART will go to sleep */
676 data->runtime_cfg.ier_reg_val = config->regs->UART2_IER_DLH_REG;
677
678 if (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_RFNE_Msk) {
679 return -EBUSY;
680 }
681 while (!(config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_TFE_Msk) ||
682 (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_BUSY_Msk)) {
683 /* Wait until FIFO is empty and UART finished tx */
684 if (config->regs->UART2_USR_REG & UART2_UART2_USR_REG_UART_RFNE_Msk) {
685 return -EBUSY;
686 }
687 }
688
689 CRG_COM->RESET_CLK_COM_REG = config->periph_clock_config;
690 da1469x_pd_release(MCU_PD_DOMAIN_COM);
691
692 return 0;
693 }
694
uart_smartbond_pm_action(const struct device * dev,enum pm_device_action action)695 static int uart_smartbond_pm_action(const struct device *dev,
696 enum pm_device_action action)
697 {
698 const struct uart_smartbond_cfg *config;
699 int ret = 0;
700
701 switch (action) {
702 case PM_DEVICE_ACTION_RESUME:
703 #ifdef CONFIG_PM_DEVICE_RUNTIME
704 uart_smartbond_pm_prevent_system_sleep();
705 #endif
706 da1469x_pd_acquire(MCU_PD_DOMAIN_COM);
707 apply_runtime_config(dev);
708 break;
709 case PM_DEVICE_ACTION_SUSPEND:
710 config = dev->config;
711 ret = uart_disable(dev);
712 if (ret == 0 && config->rx_wake_gpio.port != NULL) {
713 ret = gpio_pin_interrupt_configure_dt(&config->rx_wake_gpio,
714 GPIO_INT_MODE_EDGE |
715 GPIO_INT_TRIG_LOW);
716 }
717 #ifdef CONFIG_PM_DEVICE_RUNTIME
718 uart_smartbond_pm_allow_system_sleep();
719 #endif
720 break;
721 default:
722 ret = -ENOTSUP;
723 }
724
725 return ret;
726 }
727 #endif /* CONFIG_PM_DEVICE */
728
729 static DEVICE_API(uart, uart_smartbond_driver_api) = {
730 .poll_in = uart_smartbond_poll_in,
731 .poll_out = uart_smartbond_poll_out,
732 #ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
733 .configure = uart_smartbond_configure,
734 .config_get = uart_smartbond_config_get,
735 #endif
736 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
737 .fifo_fill = uart_smartbond_fifo_fill,
738 .fifo_read = uart_smartbond_fifo_read,
739 .irq_tx_enable = uart_smartbond_irq_tx_enable,
740 .irq_tx_disable = uart_smartbond_irq_tx_disable,
741 .irq_tx_ready = uart_smartbond_irq_tx_ready,
742 .irq_rx_enable = uart_smartbond_irq_rx_enable,
743 .irq_rx_disable = uart_smartbond_irq_rx_disable,
744 .irq_tx_complete = uart_smartbond_irq_tx_complete,
745 .irq_rx_ready = uart_smartbond_irq_rx_ready,
746 .irq_err_enable = uart_smartbond_irq_err_enable,
747 .irq_err_disable = uart_smartbond_irq_err_disable,
748 .irq_is_pending = uart_smartbond_irq_is_pending,
749 .irq_update = uart_smartbond_irq_update,
750 .irq_callback_set = uart_smartbond_irq_callback_set,
751 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
752 };
753
754 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
755 #define UART_SMARTBOND_CONFIGURE(id) \
756 do { \
757 IRQ_CONNECT(DT_INST_IRQN(id), \
758 DT_INST_IRQ(id, priority), \
759 uart_smartbond_isr, \
760 DEVICE_DT_INST_GET(id), 0); \
761 \
762 irq_enable(DT_INST_IRQN(id)); \
763 } while (0)
764 #else
765 #define UART_SMARTBOND_CONFIGURE(id)
766 #endif
767
768 #ifdef CONFIG_PM_DEVICE
769 #define UART_PM_WAKE_RX_TIMEOUT(n) \
770 .rx_wake_timeout = (DT_INST_PROP_OR(n, rx_wake_timeout, 0)),
771 #define UART_PM_WAKE_RX_PIN(n) \
772 .rx_wake_gpio = GPIO_DT_SPEC_INST_GET_OR(n, rx_wake_gpios, {0}),
773 #define UART_PM_WAKE_DTR_PIN(n) \
774 .dtr_gpio = GPIO_DT_SPEC_INST_GET_OR(n, dtr_gpios, {0}),
775 #else
776 #define UART_PM_WAKE_RX_PIN(n) /* Not used */
777 #define UART_PM_WAKE_RX_TIMEOUT(n) /* Not used */
778 #define UART_PM_WAKE_DTR_PIN(n) /* Not used */
779 #endif
780
781 #define UART_SMARTBOND_DEVICE(id) \
782 PINCTRL_DT_INST_DEFINE(id); \
783 static const struct uart_smartbond_cfg uart_smartbond_##id##_cfg = { \
784 .regs = (UART2_Type *)DT_INST_REG_ADDR(id), \
785 .periph_clock_config = DT_INST_PROP(id, periph_clock_config), \
786 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
787 .hw_flow_control_supported = DT_INST_PROP(id, hw_flow_control_supported), \
788 UART_PM_WAKE_RX_TIMEOUT(id) \
789 UART_PM_WAKE_RX_PIN(id) \
790 UART_PM_WAKE_DTR_PIN(id) \
791 }; \
792 static struct uart_smartbond_data uart_smartbond_##id##_data = { \
793 .current_config = { \
794 .baudrate = DT_INST_PROP(id, current_speed), \
795 .parity = UART_CFG_PARITY_NONE, \
796 .stop_bits = UART_CFG_STOP_BITS_1, \
797 .data_bits = UART_CFG_DATA_BITS_8, \
798 .flow_ctrl = UART_CFG_FLOW_CTRL_NONE, \
799 }, \
800 }; \
801 static int uart_smartbond_##id##_init(const struct device *dev) \
802 { \
803 UART_SMARTBOND_CONFIGURE(id); \
804 return uart_smartbond_init(dev); \
805 } \
806 PM_DEVICE_DT_INST_DEFINE(id, uart_smartbond_pm_action); \
807 DEVICE_DT_INST_DEFINE(id, \
808 uart_smartbond_##id##_init, \
809 PM_DEVICE_DT_INST_GET(id), \
810 &uart_smartbond_##id##_data, \
811 &uart_smartbond_##id##_cfg, \
812 PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
813 &uart_smartbond_driver_api); \
814
815 DT_INST_FOREACH_STATUS_OKAY(UART_SMARTBOND_DEVICE)
816
