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Searched refs:TIMER_CHCTLX_MSK (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/pwm/
Dpwm_gd32.c55 #define TIMER_CHCTLX_MSK(ch) (0xFU << (8U * (ch))) macro
121 *chctl &= ~TIMER_CHCTLX_MSK(channel); in pwm_gd32_set_cycles()