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Searched refs:STM32_SRC_HSI_KER (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/
Dspi1_per_ck_d1ppre_1.overlay18 clocks = <&rcc STM32_SRC_HSI_KER CKPER_SEL(0)>;
Dspi1_per_ck_hsi.overlay18 clocks = <&rcc STM32_SRC_HSI_KER CKPER_SEL(0)>;
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32h7rs_clock.h22 #define STM32_SRC_HSI_KER (STM32_SRC_HSI48 + 1) /* HSI + HSIKERON */ macro
23 #define STM32_SRC_CSI_KER (STM32_SRC_HSI_KER + 1) /* CSI + CSIKERON */
Dstm32h7_clock.h22 #define STM32_SRC_HSI_KER (STM32_SRC_HSI48 + 1) /* HSI + HSIKERON */ macro
23 #define STM32_SRC_CSI_KER (STM32_SRC_HSI_KER + 1) /* CSI + CSIKERON */
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/src/
Dtest_stm32_clock_configuration.c90 if (perclk_dt_domain_clk == STM32_SRC_HSI_KER) { in ZTEST()
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h7.c364 ((src_clk == STM32_SRC_HSI_KER) && IS_ENABLED(STM32_HSI_ENABLED)) ||
544 case STM32_SRC_HSI_KER: