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Searched refs:SOCFPGA_SYSMGR (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.c37 ref_clk = sys_read32(SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1)); in get_ref_clk()
45 ref_clk = sys_read32(SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2)); in get_ref_clk()
97 clock_val = sys_read32(SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1)); in get_clk_freq()
105 clock_val = sys_read32(SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2)); in get_clk_freq()
234 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_0); in get_qspi_clk()
Dclock_agilex_ll.c32 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in get_ref_clk()
39 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in get_ref_clk()
/Zephyr-latest/soc/intel/intel_socfpga/common/
Dsocfpga_system_manager.h50 #define SOCFPGA_SYSMGR(_reg) (SOCFPGA_SYSMGR_REG_BASE \ macro