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Searched refs:SL_CLOCK_MANAGER_VDAC1CLK_SOURCE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/modules/hal_silabs/simplicity_sdk/config/
Dsl_clock_manager_tree_config.h410 #define SL_CLOCK_MANAGER_VDAC1CLK_SOURCE CMU_VDAC1CLKCTRL_CLKSEL_DISABLED macro
412 #define SL_CLOCK_MANAGER_VDAC1CLK_SOURCE \ macro
423 #if SL_CLOCK_MANAGER_VDAC1CLK_SOURCE == SL_CLOCK_MANAGER_INVALID