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Searched refs:SIUL2_MSCR_SSS_MASK (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/soc/nxp/s32/s32k3/
Dpinctrl_soc.h16 #define SIUL2_MSCR_SSS_MASK GENMASK(3, 0) macro
17 #define SIUL2_MSCR_SSS(v) FIELD_PREP(SIUL2_MSCR_SSS_MASK, (v))
/Zephyr-latest/soc/nxp/s32/s32ze/
Dpinctrl_soc.h16 #define SIUL2_MSCR_SSS_MASK GENMASK(2, 0) macro
17 #define SIUL2_MSCR_SSS(v) FIELD_PREP(SIUL2_MSCR_SSS_MASK, (v))
/Zephyr-latest/drivers/gpio/
Dgpio_nxp_s32.c105 mscr_val &= ~(SIUL2_MSCR_SSS_MASK | SIUL2_MSCR_OBE_MASK | SIUL2_MSCR_IBE_MASK | in nxp_s32_gpio_configure()