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Searched refs:SILABS_DBUS_PTI_DCLK (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/silabs/
Dxg21-pinctrl.h25 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 17, 1, 0, 1) macro
195 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0)
196 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
197 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2)
198 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3)
199 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4)
200 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5)
201 #define PTI_DCLK_PD0 SILABS_DBUS_PTI_DCLK(0x3, 0x0)
202 #define PTI_DCLK_PD1 SILABS_DBUS_PTI_DCLK(0x3, 0x1)
203 #define PTI_DCLK_PD2 SILABS_DBUS_PTI_DCLK(0x3, 0x2)
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Dxg22-pinctrl.h21 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 15, 1, 0, 1) macro
177 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0)
178 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
179 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2)
180 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3)
181 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4)
182 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5)
183 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6)
184 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7)
185 #define PTI_DCLK_PD0 SILABS_DBUS_PTI_DCLK(0x3, 0x0)
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Dxg27-pinctrl.h30 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 27, 1, 0, 1) macro
365 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0)
366 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
367 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2)
368 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3)
369 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4)
370 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5)
371 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6)
372 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7)
373 #define PTI_DCLK_PD0 SILABS_DBUS_PTI_DCLK(0x3, 0x0)
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Dxg24-pinctrl.h39 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 37, 1, 0, 1) macro
576 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0)
577 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
578 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2)
579 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3)
580 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4)
581 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5)
582 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6)
583 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7)
584 #define PTI_DCLK_PC8 SILABS_DBUS_PTI_DCLK(0x2, 0x8)
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Dxg23-pinctrl.h46 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 57, 1, 0, 1) macro
720 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0)
721 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1)
722 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2)
723 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3)
724 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4)
725 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5)
726 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6)
727 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7)
728 #define PTI_DCLK_PC8 SILABS_DBUS_PTI_DCLK(0x2, 0x8)
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