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Searched refs:SIFIVE_SYSCON_TEST (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/soc/qemu/virt_riscv/common/
Dsoc.c16 #define SIFIVE_SYSCON_TEST 0x00100000 macro
33 volatile uint32_t *reg = (uint32_t *)SIFIVE_SYSCON_TEST; in sys_arch_reboot()