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Searched refs:SCB_CFSR_BUSFAULTSR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/arch/arm/core/cortex_m/
Dfault.c59 #define SCB_CFSR_BUSFAULTSR \ macro
103 PR_EXC("MMFSR: 0x%x, BFSR: 0x%x, UFSR: 0x%x", SCB_CFSR_MEMFAULTSR, SCB_CFSR_BUSFAULTSR, in fault_show()