Searched refs:REG_RX_FIFO_PIRQ (Results 1 – 2 of 2) sorted by relevance
28 REG_RX_FIFO_PIRQ = 0x120, /* Receive FIFO Programmable Depth Interrupt */ enumerator
64 sys_write32(0, config->base + REG_RX_FIFO_PIRQ); in i2c_xilinx_axi_target_setup()356 sys_write32(0, config->base + REG_RX_FIFO_PIRQ); in i2c_xilinx_axi_read_nondyn()412 sys_write32(bytes_to_read - 1, config->base + REG_RX_FIFO_PIRQ); in i2c_xilinx_axi_read_dyn()428 sys_write32(bytes_to_read - 1, config->base + REG_RX_FIFO_PIRQ); in i2c_xilinx_axi_read_dyn()
