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Searched refs:PLL0_DIV (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/soc/atmel/sam/sam4l/
Dsoc.c55 #define PLL0_DIV 4 macro
209 uint32_t pll_config = pll_config_init(PLL0_DIV, in clock_init()