Searched refs:PHY_CTL1_SPEEDUPLX_MASK (Results 1 – 1 of 1) sorted by relevance
81 #define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /* The PHY speed and duplex mask. */ macro314 switch (status & PHY_CTL1_SPEEDUPLX_MASK) { in eth_mcux_decode_duplex_and_speed()
