Searched refs:PCLK_DIV_REG_TO_VAL (Results 1 – 1 of 1) sorted by relevance
41 #define PCLK_DIV_REG_TO_VAL(x) ((x + 1) << 1) macro124 clk_div = PCLK_DIV_REG_TO_VAL(FIELD_GET(PCLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
