1 /* 2 * Copyright (c) 2024, Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef NRFX_KCONFIG_H__ 8 #define NRFX_KCONFIG_H__ 9 10 /* 11 * These are mappings of Kconfig options enabling nrfx drivers and particular 12 * peripheral instances to the corresponding symbols used inside of nrfx. 13 * Please note that only subsets of these entries are used for particular SoCs 14 * supported by nrfx (see the corresponding nrfx_config_*.h files). 15 */ 16 17 #ifdef CONFIG_NRFX_ADC 18 #define NRFX_ADC_ENABLED 1 19 #endif 20 #ifdef CONFIG_NRFX_ADC_LOG 21 #define NRFX_ADC_CONFIG_LOG_ENABLED 1 22 #endif 23 24 #ifdef CONFIG_NRFX_CLOCK 25 #define NRFX_CLOCK_ENABLED 1 26 #endif 27 #ifdef CONFIG_NRFX_CLOCK_LOG 28 #define NRFX_CLOCK_CONFIG_LOG_ENABLED 1 29 #endif 30 31 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC 32 #if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X) 33 #define NRFX_CLOCK_CONFIG_LF_SRC 1 34 #else 35 #define NRFX_CLOCK_CONFIG_LF_SRC 0 36 #endif 37 #endif 38 39 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL 40 #if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X) 41 #define NRFX_CLOCK_CONFIG_LF_SRC 2 42 #else 43 #define NRFX_CLOCK_CONFIG_LF_SRC 1 44 #endif 45 #endif 46 47 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH 48 #ifdef CONFIG_SOC_COMPATIBLE_NRF53X 49 #define NRFX_CLOCK_CONFIG_LF_SRC 3 50 #else 51 #define NRFX_CLOCK_CONFIG_LF_SRC 2 52 #endif 53 #endif 54 55 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING 56 #define NRFX_CLOCK_CONFIG_LF_SRC 131073 57 #endif 58 59 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING 60 #define NRFX_CLOCK_CONFIG_LF_SRC 196609 61 #endif 62 63 #ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION 64 #define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 1 65 #endif 66 67 #ifdef CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED 68 #define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 1 69 #endif 70 71 #ifdef CONFIG_NRFX_COMP 72 #define NRFX_COMP_ENABLED 1 73 #endif 74 #ifdef CONFIG_NRFX_COMP_LOG 75 #define NRFX_COMP_CONFIG_LOG_ENABLED 1 76 #endif 77 78 #ifdef CONFIG_NRFX_CRACEN 79 #define NRFX_CRACEN_ENABLED 1 80 #endif 81 82 #ifdef CONFIG_NRFX_DPPI 83 #define NRFX_DPPI_ENABLED 1 84 #endif 85 #ifdef CONFIG_NRFX_DPPI_LOG 86 #define NRFX_DPPI_CONFIG_LOG_ENABLED 1 87 #endif 88 #ifdef CONFIG_NRFX_DPPI0 89 #define NRFX_DPPI0_ENABLED 1 90 #endif 91 #ifdef CONFIG_NRFX_DPPI00 92 #define NRFX_DPPI00_ENABLED 1 93 #endif 94 #ifdef CONFIG_NRFX_DPPI10 95 #define NRFX_DPPI10_ENABLED 1 96 #endif 97 #ifdef CONFIG_NRFX_DPPI20 98 #define NRFX_DPPI20_ENABLED 1 99 #endif 100 #ifdef CONFIG_NRFX_DPPI30 101 #define NRFX_DPPI30_ENABLED 1 102 #endif 103 #ifdef CONFIG_NRFX_DPPI020 104 #define NRFX_DPPI020_ENABLED 1 105 #endif 106 #ifdef CONFIG_NRFX_DPPI120 107 #define NRFX_DPPI120_ENABLED 1 108 #endif 109 #ifdef CONFIG_NRFX_DPPI130 110 #define NRFX_DPPI130_ENABLED 1 111 #endif 112 #ifdef CONFIG_NRFX_DPPI131 113 #define NRFX_DPPI131_ENABLED 1 114 #endif 115 #ifdef CONFIG_NRFX_DPPI132 116 #define NRFX_DPPI132_ENABLED 1 117 #endif 118 #ifdef CONFIG_NRFX_DPPI133 119 #define NRFX_DPPI133_ENABLED 1 120 #endif 121 #ifdef CONFIG_NRFX_DPPI134 122 #define NRFX_DPPI134_ENABLED 1 123 #endif 124 #ifdef CONFIG_NRFX_DPPI135 125 #define NRFX_DPPI135_ENABLED 1 126 #endif 127 #ifdef CONFIG_NRFX_DPPI136 128 #define NRFX_DPPI136_ENABLED 1 129 #endif 130 131 #ifdef CONFIG_NRFX_EGU 132 #define NRFX_EGU_ENABLED 1 133 #endif 134 #ifdef CONFIG_NRFX_EGU_LOG 135 #define NRFX_EGU_CONFIG_LOG_ENABLED 1 136 #endif 137 #ifdef CONFIG_NRFX_EGU0 138 #define NRFX_EGU0_ENABLED 1 139 #endif 140 #ifdef CONFIG_NRFX_EGU1 141 #define NRFX_EGU1_ENABLED 1 142 #endif 143 #ifdef CONFIG_NRFX_EGU2 144 #define NRFX_EGU2_ENABLED 1 145 #endif 146 #ifdef CONFIG_NRFX_EGU3 147 #define NRFX_EGU3_ENABLED 1 148 #endif 149 #ifdef CONFIG_NRFX_EGU4 150 #define NRFX_EGU4_ENABLED 1 151 #endif 152 #ifdef CONFIG_NRFX_EGU5 153 #define NRFX_EGU5_ENABLED 1 154 #endif 155 #ifdef CONFIG_NRFX_EGU10 156 #define NRFX_EGU10_ENABLED 1 157 #endif 158 #ifdef CONFIG_NRFX_EGU20 159 #define NRFX_EGU20_ENABLED 1 160 #endif 161 #ifdef CONFIG_NRFX_EGU020 162 #define NRFX_EGU020_ENABLED 1 163 #endif 164 #ifdef CONFIG_NRFX_EGU130 165 #define NRFX_EGU130_ENABLED 1 166 #endif 167 168 #ifdef CONFIG_NRFX_GRTC 169 #define NRFX_GRTC_ENABLED 1 170 #endif 171 #ifdef CONFIG_NRFX_GRTC_LOG 172 #define NRFX_GRTC_CONFIG_LOG_ENABLED 1 173 #endif 174 175 #ifdef CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT 176 #define NRF_GRTC_HAS_EXTENDED 1 177 #endif 178 #ifdef CONFIG_NRF_GRTC_TIMER_AUTO_KEEP_ALIVE 179 #define NRFX_GRTC_CONFIG_AUTOEN 1 180 #endif 181 #ifdef CONFIG_NRF_GRTC_START_SYSCOUNTER 182 #define NRFX_GRTC_CONFIG_AUTOSTART 1 183 #endif 184 185 #ifdef CONFIG_NRFX_GPIOTE 186 #define NRFX_GPIOTE_ENABLED 1 187 #endif 188 #ifdef CONFIG_NRFX_GPIOTE_LOG 189 #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 1 190 #endif 191 #ifdef CONFIG_NRFX_GPIOTE0 192 #define NRFX_GPIOTE0_ENABLED 1 193 #endif 194 #ifdef CONFIG_NRFX_GPIOTE1 195 #define NRFX_GPIOTE1_ENABLED 1 196 #endif 197 #ifdef CONFIG_NRFX_GPIOTE20 198 #define NRFX_GPIOTE20_ENABLED 1 199 #endif 200 #ifdef CONFIG_NRFX_GPIOTE30 201 #define NRFX_GPIOTE30_ENABLED 1 202 #endif 203 #ifdef CONFIG_NRFX_GPIOTE130 204 #define NRFX_GPIOTE130_ENABLED 1 205 #endif 206 #ifdef CONFIG_NRFX_GPIOTE131 207 #define NRFX_GPIOTE131_ENABLED 1 208 #endif 209 210 #ifdef CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 211 #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS 212 #endif 213 214 #ifdef CONFIG_NRFX_I2S 215 #define NRFX_I2S_ENABLED 1 216 #endif 217 #ifdef CONFIG_NRFX_I2S_LOG 218 #define NRFX_I2S_CONFIG_LOG_ENABLED 1 219 #endif 220 #ifdef CONFIG_NRFX_I2S0 221 #define NRFX_I2S0_ENABLED 1 222 #endif 223 #ifdef CONFIG_NRFX_I2S20 224 #define NRFX_I2S20_ENABLED 1 225 #endif 226 227 #ifdef CONFIG_NRFX_IPC 228 #define NRFX_IPC_ENABLED 1 229 #endif 230 #ifdef CONFIG_NRFX_IPC_LOG 231 #define NRFX_IPC_CONFIG_LOG_ENABLED 1 232 #endif 233 234 #ifdef CONFIG_NRFX_LPCOMP 235 #define NRFX_LPCOMP_ENABLED 1 236 #endif 237 #ifdef CONFIG_NRFX_LPCOMP_LOG 238 #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 1 239 #endif 240 241 #ifdef CONFIG_NRFX_NFCT 242 #define NRFX_NFCT_ENABLED 1 243 #endif 244 #ifdef CONFIG_NRFX_NFCT_LOG 245 #define NRFX_NFCT_CONFIG_LOG_ENABLED 1 246 #endif 247 248 #ifdef CONFIG_NRFX_NVMC 249 #define NRFX_NVMC_ENABLED 1 250 #endif 251 #ifdef CONFIG_NRFX_NVMC_LOG 252 #define NRFX_NVMC_CONFIG_LOG_ENABLED 1 253 #endif 254 255 #ifdef CONFIG_NRFX_PDM 256 #define NRFX_PDM_ENABLED 1 257 #endif 258 #ifdef CONFIG_NRFX_PDM_LOG 259 #define NRFX_PDM_CONFIG_LOG_ENABLED 1 260 #endif 261 #ifdef CONFIG_NRFX_PDM0 262 #define NRFX_PDM0_ENABLED 1 263 #endif 264 #ifdef CONFIG_NRFX_PDM20 265 #define NRFX_PDM20_ENABLED 1 266 #endif 267 #ifdef CONFIG_NRFX_PDM21 268 #define NRFX_PDM21_ENABLED 1 269 #endif 270 271 #ifdef CONFIG_NRFX_POWER 272 #define NRFX_POWER_ENABLED 1 273 #endif 274 #ifdef CONFIG_NRFX_POWER_LOG 275 #define NRFX_POWER_CONFIG_LOG_ENABLED 1 276 #endif 277 278 #ifdef CONFIG_NRFX_PPI 279 #define NRFX_PPI_ENABLED 1 280 #endif 281 #ifdef CONFIG_NRFX_PPI_LOG 282 #define NRFX_PPI_CONFIG_LOG_ENABLED 1 283 #endif 284 285 #ifdef CONFIG_NRFX_PPIB 286 #define NRFX_PPIB_ENABLED 1 287 #endif 288 #ifdef CONFIG_NRFX_PPIB_LOG 289 #define NRFX_PPIB_CONFIG_LOG_ENABLED 1 290 #endif 291 #ifdef CONFIG_NRFX_PPIB00 292 #define NRFX_PPIB00_ENABLED 1 293 #endif 294 #ifdef CONFIG_NRFX_PPIB01 295 #define NRFX_PPIB01_ENABLED 1 296 #endif 297 #ifdef CONFIG_NRFX_PPIB10 298 #define NRFX_PPIB10_ENABLED 1 299 #endif 300 #ifdef CONFIG_NRFX_PPIB11 301 #define NRFX_PPIB11_ENABLED 1 302 #endif 303 #ifdef CONFIG_NRFX_PPIB20 304 #define NRFX_PPIB20_ENABLED 1 305 #endif 306 #ifdef CONFIG_NRFX_PPIB21 307 #define NRFX_PPIB21_ENABLED 1 308 #endif 309 #ifdef CONFIG_NRFX_PPIB22 310 #define NRFX_PPIB22_ENABLED 1 311 #endif 312 #ifdef CONFIG_NRFX_PPIB30 313 #define NRFX_PPIB30_ENABLED 1 314 #endif 315 316 #ifdef CONFIG_NRFX_PRS 317 #define NRFX_PRS_ENABLED 1 318 #endif 319 #ifdef CONFIG_NRFX_PRS_LOG 320 #define NRFX_PRS_CONFIG_LOG_ENABLED 1 321 #endif 322 #ifdef CONFIG_NRFX_PRS_BOX_0 323 #define NRFX_PRS_BOX_0_ENABLED 1 324 #endif 325 #ifdef CONFIG_NRFX_PRS_BOX_1 326 #define NRFX_PRS_BOX_1_ENABLED 1 327 #endif 328 #ifdef CONFIG_NRFX_PRS_BOX_2 329 #define NRFX_PRS_BOX_2_ENABLED 1 330 #endif 331 #ifdef CONFIG_NRFX_PRS_BOX_3 332 #define NRFX_PRS_BOX_3_ENABLED 1 333 #endif 334 #ifdef CONFIG_NRFX_PRS_BOX_4 335 #define NRFX_PRS_BOX_4_ENABLED 1 336 #endif 337 338 #ifdef CONFIG_NRFX_PWM 339 #define NRFX_PWM_ENABLED 1 340 #endif 341 #ifdef CONFIG_NRFX_PWM_LOG 342 #define NRFX_PWM_CONFIG_LOG_ENABLED 1 343 #endif 344 #ifdef CONFIG_NRFX_PWM0 345 #define NRFX_PWM0_ENABLED 1 346 #endif 347 #ifdef CONFIG_NRFX_PWM1 348 #define NRFX_PWM1_ENABLED 1 349 #endif 350 #ifdef CONFIG_NRFX_PWM2 351 #define NRFX_PWM2_ENABLED 1 352 #endif 353 #ifdef CONFIG_NRFX_PWM3 354 #define NRFX_PWM3_ENABLED 1 355 #endif 356 #ifdef CONFIG_NRFX_PWM20 357 #define NRFX_PWM20_ENABLED 1 358 #endif 359 #ifdef CONFIG_NRFX_PWM21 360 #define NRFX_PWM21_ENABLED 1 361 #endif 362 #ifdef CONFIG_NRFX_PWM22 363 #define NRFX_PWM22_ENABLED 1 364 #endif 365 #ifdef CONFIG_NRFX_PWM120 366 #define NRFX_PWM120_ENABLED 1 367 #endif 368 #ifdef CONFIG_NRFX_PWM130 369 #define NRFX_PWM130_ENABLED 1 370 #endif 371 #ifdef CONFIG_NRFX_PWM131 372 #define NRFX_PWM131_ENABLED 1 373 #endif 374 #ifdef CONFIG_NRFX_PWM132 375 #define NRFX_PWM132_ENABLED 1 376 #endif 377 #ifdef CONFIG_NRFX_PWM133 378 #define NRFX_PWM133_ENABLED 1 379 #endif 380 381 #ifdef CONFIG_NRFX_QDEC 382 #define NRFX_QDEC_ENABLED 1 383 #endif 384 #ifdef CONFIG_NRFX_QDEC_LOG 385 #define NRFX_QDEC_CONFIG_LOG_ENABLED 1 386 #endif 387 #ifdef CONFIG_NRFX_QDEC0 388 #define NRFX_QDEC0_ENABLED 1 389 #endif 390 #ifdef CONFIG_NRFX_QDEC1 391 #define NRFX_QDEC1_ENABLED 1 392 #endif 393 #ifdef CONFIG_NRFX_QDEC20 394 #define NRFX_QDEC20_ENABLED 1 395 #endif 396 #ifdef CONFIG_NRFX_QDEC21 397 #define NRFX_QDEC21_ENABLED 1 398 #endif 399 #ifdef CONFIG_NRFX_QDEC130 400 #define NRFX_QDEC130_ENABLED 1 401 #endif 402 #ifdef CONFIG_NRFX_QDEC131 403 #define NRFX_QDEC131_ENABLED 1 404 #endif 405 406 #ifdef CONFIG_NRFX_QSPI 407 #define NRFX_QSPI_ENABLED 1 408 #endif 409 #ifdef CONFIG_NRFX_QSPI_LOG 410 #define NRFX_QSPI_CONFIG_LOG_ENABLED 1 411 #endif 412 413 #ifdef CONFIG_NRFX_RNG 414 #define NRFX_RNG_ENABLED 1 415 #endif 416 #ifdef CONFIG_NRFX_RNG_LOG 417 #define NRFX_RNG_CONFIG_LOG_ENABLED 1 418 #endif 419 420 #ifdef CONFIG_NRFX_RRAMC 421 #define NRFX_RRAMC_ENABLED 1 422 #endif 423 424 #ifdef CONFIG_NRFX_RTC 425 #define NRFX_RTC_ENABLED 1 426 #endif 427 #ifdef CONFIG_NRFX_RTC_LOG 428 #define NRFX_RTC_CONFIG_LOG_ENABLED 1 429 #endif 430 #ifdef CONFIG_NRFX_RTC0 431 #define NRFX_RTC0_ENABLED 1 432 #endif 433 #ifdef CONFIG_NRFX_RTC1 434 #define NRFX_RTC1_ENABLED 1 435 #endif 436 #ifdef CONFIG_NRFX_RTC2 437 #define NRFX_RTC2_ENABLED 1 438 #endif 439 #ifdef CONFIG_NRFX_RTC130 440 #define NRFX_RTC130_ENABLED 1 441 #endif 442 #ifdef CONFIG_NRFX_RTC131 443 #define NRFX_RTC131_ENABLED 1 444 #endif 445 446 #ifdef CONFIG_NRFX_SAADC 447 #define NRFX_SAADC_ENABLED 1 448 #endif 449 #ifdef CONFIG_NRFX_SAADC_LOG 450 #define NRFX_SAADC_CONFIG_LOG_ENABLED 1 451 #endif 452 453 #ifdef CONFIG_NRFX_SPI 454 #define NRFX_SPI_ENABLED 1 455 #endif 456 #ifdef CONFIG_NRFX_SPI_LOG 457 #define NRFX_SPI_CONFIG_LOG_ENABLED 1 458 #endif 459 #ifdef CONFIG_NRFX_SPI0 460 #define NRFX_SPI0_ENABLED 1 461 #endif 462 #ifdef CONFIG_NRFX_SPI1 463 #define NRFX_SPI1_ENABLED 1 464 #endif 465 #ifdef CONFIG_NRFX_SPI2 466 #define NRFX_SPI2_ENABLED 1 467 #endif 468 469 #ifdef CONFIG_NRFX_SPIM 470 #define NRFX_SPIM_ENABLED 1 471 #endif 472 #ifdef CONFIG_NRFX_SPIM_LOG 473 #define NRFX_SPIM_CONFIG_LOG_ENABLED 1 474 #endif 475 #ifdef CONFIG_NRFX_SPIM0 476 #define NRFX_SPIM0_ENABLED 1 477 #endif 478 #ifdef CONFIG_NRFX_SPIM1 479 #define NRFX_SPIM1_ENABLED 1 480 #endif 481 #ifdef CONFIG_NRFX_SPIM2 482 #define NRFX_SPIM2_ENABLED 1 483 #endif 484 #ifdef CONFIG_NRFX_SPIM3 485 #define NRFX_SPIM3_ENABLED 1 486 #ifdef CONFIG_NRF52_ANOMALY_198_WORKAROUND 487 #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1 488 #endif 489 #endif 490 #ifdef CONFIG_NRFX_SPIM4 491 #define NRFX_SPIM4_ENABLED 1 492 #endif 493 494 #define NRFX_SPIM_DT_HAS_RX_DELAY(node) DT_PROP(node, rx_delay_supported) + 495 496 #ifndef NRFX_SPIM_EXTENDED_ENABLED 497 #if DT_FOREACH_STATUS_OKAY(nordic_nrf_spim, NRFX_SPIM_DT_HAS_RX_DELAY) 0 498 #define NRFX_SPIM_EXTENDED_ENABLED 1 499 #endif 500 #endif 501 502 #ifdef CONFIG_NRFX_SPIM00 503 #define NRFX_SPIM00_ENABLED 1 504 #endif 505 #ifdef CONFIG_NRFX_SPIM20 506 #define NRFX_SPIM20_ENABLED 1 507 #endif 508 #ifdef CONFIG_NRFX_SPIM21 509 #define NRFX_SPIM21_ENABLED 1 510 #endif 511 #ifdef CONFIG_NRFX_SPIM22 512 #define NRFX_SPIM22_ENABLED 1 513 #endif 514 #ifdef CONFIG_NRFX_SPIM30 515 #define NRFX_SPIM30_ENABLED 1 516 #endif 517 #ifdef CONFIG_NRFX_SPIM120 518 #define NRFX_SPIM120_ENABLED 1 519 #endif 520 #ifdef CONFIG_NRFX_SPIM121 521 #define NRFX_SPIM121_ENABLED 1 522 #endif 523 #ifdef CONFIG_NRFX_SPIM130 524 #define NRFX_SPIM130_ENABLED 1 525 #endif 526 #ifdef CONFIG_NRFX_SPIM131 527 #define NRFX_SPIM131_ENABLED 1 528 #endif 529 #ifdef CONFIG_NRFX_SPIM132 530 #define NRFX_SPIM132_ENABLED 1 531 #endif 532 #ifdef CONFIG_NRFX_SPIM133 533 #define NRFX_SPIM133_ENABLED 1 534 #endif 535 #ifdef CONFIG_NRFX_SPIM134 536 #define NRFX_SPIM134_ENABLED 1 537 #endif 538 #ifdef CONFIG_NRFX_SPIM135 539 #define NRFX_SPIM135_ENABLED 1 540 #endif 541 #ifdef CONFIG_NRFX_SPIM136 542 #define NRFX_SPIM136_ENABLED 1 543 #endif 544 #ifdef CONFIG_NRFX_SPIM137 545 #define NRFX_SPIM137_ENABLED 1 546 #endif 547 548 #ifdef CONFIG_NRFX_SPIS 549 #define NRFX_SPIS_ENABLED 1 550 #endif 551 #ifdef CONFIG_NRFX_SPIS_LOG 552 #define NRFX_SPIS_CONFIG_LOG_ENABLED 1 553 #endif 554 #ifdef CONFIG_NRFX_SPIS0 555 #define NRFX_SPIS0_ENABLED 1 556 #endif 557 #ifdef CONFIG_NRFX_SPIS1 558 #define NRFX_SPIS1_ENABLED 1 559 #endif 560 #ifdef CONFIG_NRFX_SPIS2 561 #define NRFX_SPIS2_ENABLED 1 562 #endif 563 #ifdef CONFIG_NRFX_SPIS3 564 #define NRFX_SPIS3_ENABLED 1 565 #endif 566 #ifdef CONFIG_NRFX_SPIS00 567 #define NRFX_SPIS00_ENABLED 1 568 #endif 569 #ifdef CONFIG_NRFX_SPIS20 570 #define NRFX_SPIS20_ENABLED 1 571 #endif 572 #ifdef CONFIG_NRFX_SPIS21 573 #define NRFX_SPIS21_ENABLED 1 574 #endif 575 #ifdef CONFIG_NRFX_SPIS22 576 #define NRFX_SPIS22_ENABLED 1 577 #endif 578 #ifdef CONFIG_NRFX_SPIS30 579 #define NRFX_SPIS30_ENABLED 1 580 #endif 581 #ifdef CONFIG_NRFX_SPIS120 582 #define NRFX_SPIS120_ENABLED 1 583 #endif 584 #ifdef CONFIG_NRFX_SPIS130 585 #define NRFX_SPIS130_ENABLED 1 586 #endif 587 #ifdef CONFIG_NRFX_SPIS131 588 #define NRFX_SPIS131_ENABLED 1 589 #endif 590 #ifdef CONFIG_NRFX_SPIS132 591 #define NRFX_SPIS132_ENABLED 1 592 #endif 593 #ifdef CONFIG_NRFX_SPIS133 594 #define NRFX_SPIS133_ENABLED 1 595 #endif 596 #ifdef CONFIG_NRFX_SPIS134 597 #define NRFX_SPIS134_ENABLED 1 598 #endif 599 #ifdef CONFIG_NRFX_SPIS135 600 #define NRFX_SPIS135_ENABLED 1 601 #endif 602 #ifdef CONFIG_NRFX_SPIS136 603 #define NRFX_SPIS136_ENABLED 1 604 #endif 605 #ifdef CONFIG_NRFX_SPIS137 606 #define NRFX_SPIS137_ENABLED 1 607 #endif 608 609 #ifdef CONFIG_NRFX_SYSTICK 610 #define NRFX_SYSTICK_ENABLED 1 611 #endif 612 #ifdef CONFIG_NRFX_SYSTICK_LOG 613 #define NRFX_SYSTICK_CONFIG_LOG_ENABLED 1 614 #endif 615 616 #ifdef CONFIG_NRFX_TBM 617 #define NRFX_TBM_ENABLED 1 618 #endif 619 620 #ifdef CONFIG_NRFX_TEMP 621 #define NRFX_TEMP_ENABLED 1 622 #endif 623 #ifdef CONFIG_NRFX_TEMP_LOG 624 #define NRFX_TEMP_CONFIG_LOG_ENABLED 1 625 #endif 626 627 #ifdef CONFIG_NRFX_TIMER 628 #define NRFX_TIMER_ENABLED 1 629 #endif 630 #ifdef CONFIG_NRFX_TIMER_LOG 631 #define NRFX_TIMER_CONFIG_LOG_ENABLED 1 632 #endif 633 #ifdef CONFIG_NRFX_TIMER0 634 #define NRFX_TIMER0_ENABLED 1 635 #endif 636 #ifdef CONFIG_NRFX_TIMER1 637 #define NRFX_TIMER1_ENABLED 1 638 #endif 639 #ifdef CONFIG_NRFX_TIMER2 640 #define NRFX_TIMER2_ENABLED 1 641 #endif 642 #ifdef CONFIG_NRFX_TIMER3 643 #define NRFX_TIMER3_ENABLED 1 644 #endif 645 #ifdef CONFIG_NRFX_TIMER4 646 #define NRFX_TIMER4_ENABLED 1 647 #endif 648 #ifdef CONFIG_NRFX_TIMER00 649 #define NRFX_TIMER00_ENABLED 1 650 #endif 651 #ifdef CONFIG_NRFX_TIMER10 652 #define NRFX_TIMER10_ENABLED 1 653 #endif 654 #ifdef CONFIG_NRFX_TIMER20 655 #define NRFX_TIMER20_ENABLED 1 656 #endif 657 #ifdef CONFIG_NRFX_TIMER21 658 #define NRFX_TIMER21_ENABLED 1 659 #endif 660 #ifdef CONFIG_NRFX_TIMER22 661 #define NRFX_TIMER22_ENABLED 1 662 #endif 663 #ifdef CONFIG_NRFX_TIMER23 664 #define NRFX_TIMER23_ENABLED 1 665 #endif 666 #ifdef CONFIG_NRFX_TIMER24 667 #define NRFX_TIMER24_ENABLED 1 668 #endif 669 #ifdef CONFIG_NRFX_TIMER020 670 #define NRFX_TIMER020_ENABLED 1 671 #endif 672 #ifdef CONFIG_NRFX_TIMER021 673 #define NRFX_TIMER021_ENABLED 1 674 #endif 675 #ifdef CONFIG_NRFX_TIMER022 676 #define NRFX_TIMER022_ENABLED 1 677 #endif 678 #ifdef CONFIG_NRFX_TIMER120 679 #define NRFX_TIMER120_ENABLED 1 680 #endif 681 #ifdef CONFIG_NRFX_TIMER121 682 #define NRFX_TIMER121_ENABLED 1 683 #endif 684 #ifdef CONFIG_NRFX_TIMER130 685 #define NRFX_TIMER130_ENABLED 1 686 #endif 687 #ifdef CONFIG_NRFX_TIMER131 688 #define NRFX_TIMER131_ENABLED 1 689 #endif 690 #ifdef CONFIG_NRFX_TIMER132 691 #define NRFX_TIMER132_ENABLED 1 692 #endif 693 #ifdef CONFIG_NRFX_TIMER133 694 #define NRFX_TIMER133_ENABLED 1 695 #endif 696 #ifdef CONFIG_NRFX_TIMER134 697 #define NRFX_TIMER134_ENABLED 1 698 #endif 699 #ifdef CONFIG_NRFX_TIMER135 700 #define NRFX_TIMER135_ENABLED 1 701 #endif 702 #ifdef CONFIG_NRFX_TIMER136 703 #define NRFX_TIMER136_ENABLED 1 704 #endif 705 #ifdef CONFIG_NRFX_TIMER137 706 #define NRFX_TIMER137_ENABLED 1 707 #endif 708 709 #ifdef CONFIG_NRFX_TWI 710 #define NRFX_TWI_ENABLED 1 711 #endif 712 #ifdef CONFIG_NRFX_TWI_LOG 713 #define NRFX_TWI_CONFIG_LOG_ENABLED 1 714 #endif 715 #ifdef CONFIG_NRFX_TWI0 716 #define NRFX_TWI0_ENABLED 1 717 #endif 718 #ifdef CONFIG_NRFX_TWI1 719 #define NRFX_TWI1_ENABLED 1 720 #endif 721 722 #ifdef CONFIG_NRFX_TWIM 723 #define NRFX_TWIM_ENABLED 1 724 #endif 725 #ifdef CONFIG_NRFX_TWIM_LOG 726 #define NRFX_TWIM_CONFIG_LOG_ENABLED 1 727 #endif 728 #ifdef CONFIG_NRFX_TWIM0 729 #define NRFX_TWIM0_ENABLED 1 730 #endif 731 #ifdef CONFIG_NRFX_TWIM1 732 #define NRFX_TWIM1_ENABLED 1 733 #endif 734 #ifdef CONFIG_NRFX_TWIM2 735 #define NRFX_TWIM2_ENABLED 1 736 #endif 737 #ifdef CONFIG_NRFX_TWIM3 738 #define NRFX_TWIM3_ENABLED 1 739 #endif 740 #ifdef CONFIG_NRFX_TWIM20 741 #define NRFX_TWIM20_ENABLED 1 742 #endif 743 #ifdef CONFIG_NRFX_TWIM21 744 #define NRFX_TWIM21_ENABLED 1 745 #endif 746 #ifdef CONFIG_NRFX_TWIM22 747 #define NRFX_TWIM22_ENABLED 1 748 #endif 749 #ifdef CONFIG_NRFX_TWIM30 750 #define NRFX_TWIM30_ENABLED 1 751 #endif 752 #ifdef CONFIG_NRFX_TWIM120 753 #define NRFX_TWIM120_ENABLED 1 754 #endif 755 #ifdef CONFIG_NRFX_TWIM130 756 #define NRFX_TWIM130_ENABLED 1 757 #endif 758 #ifdef CONFIG_NRFX_TWIM131 759 #define NRFX_TWIM131_ENABLED 1 760 #endif 761 #ifdef CONFIG_NRFX_TWIM132 762 #define NRFX_TWIM132_ENABLED 1 763 #endif 764 #ifdef CONFIG_NRFX_TWIM133 765 #define NRFX_TWIM133_ENABLED 1 766 #endif 767 #ifdef CONFIG_NRFX_TWIM134 768 #define NRFX_TWIM134_ENABLED 1 769 #endif 770 #ifdef CONFIG_NRFX_TWIM135 771 #define NRFX_TWIM135_ENABLED 1 772 #endif 773 #ifdef CONFIG_NRFX_TWIM136 774 #define NRFX_TWIM136_ENABLED 1 775 #endif 776 #ifdef CONFIG_NRFX_TWIM137 777 #define NRFX_TWIM137_ENABLED 1 778 #endif 779 #ifdef CONFIG_NRF52_ANOMALY_219_WORKAROUND 780 #define NRFX_TWIM_NRF52_ANOMALY_219_WORKAROUND_ENABLED 1 781 #endif 782 #ifdef CONFIG_SOC_NRF53_ANOMALY_47_WORKAROUND 783 #define NRFX_TWIM_NRF53_ANOMALY_47_WORKAROUND_ENABLED 1 784 #endif 785 786 #ifdef CONFIG_NRFX_TWIS 787 #define NRFX_TWIS_ENABLED 1 788 #endif 789 #ifdef CONFIG_NRFX_TWIS_LOG 790 #define NRFX_TWIS_CONFIG_LOG_ENABLED 1 791 #endif 792 #ifdef CONFIG_NRFX_TWIS0 793 #define NRFX_TWIS0_ENABLED 1 794 #endif 795 #ifdef CONFIG_NRFX_TWIS1 796 #define NRFX_TWIS1_ENABLED 1 797 #endif 798 #ifdef CONFIG_NRFX_TWIS2 799 #define NRFX_TWIS2_ENABLED 1 800 #endif 801 #ifdef CONFIG_NRFX_TWIS3 802 #define NRFX_TWIS3_ENABLED 1 803 #endif 804 #ifdef CONFIG_NRFX_TWIS20 805 #define NRFX_TWIS20_ENABLED 1 806 #endif 807 #ifdef CONFIG_NRFX_TWIS21 808 #define NRFX_TWIS21_ENABLED 1 809 #endif 810 #ifdef CONFIG_NRFX_TWIS22 811 #define NRFX_TWIS22_ENABLED 1 812 #endif 813 #ifdef CONFIG_NRFX_TWIS30 814 #define NRFX_TWIS30_ENABLED 1 815 #endif 816 #ifdef CONFIG_NRFX_TWIS130 817 #define NRFX_TWIS130_ENABLED 1 818 #endif 819 #ifdef CONFIG_NRFX_TWIS131 820 #define NRFX_TWIS131_ENABLED 1 821 #endif 822 #ifdef CONFIG_NRFX_TWIS132 823 #define NRFX_TWIS132_ENABLED 1 824 #endif 825 #ifdef CONFIG_NRFX_TWIS133 826 #define NRFX_TWIS133_ENABLED 1 827 #endif 828 #ifdef CONFIG_NRFX_TWIS134 829 #define NRFX_TWIS134_ENABLED 1 830 #endif 831 #ifdef CONFIG_NRFX_TWIS135 832 #define NRFX_TWIS135_ENABLED 1 833 #endif 834 #ifdef CONFIG_NRFX_TWIS136 835 #define NRFX_TWIS136_ENABLED 1 836 #endif 837 #ifdef CONFIG_NRFX_TWIS137 838 #define NRFX_TWIS137_ENABLED 1 839 #endif 840 841 #ifdef CONFIG_NRFX_UART 842 #define NRFX_UART_ENABLED 1 843 #endif 844 #ifdef CONFIG_NRFX_UART_LOG 845 #define NRFX_UART_CONFIG_LOG_ENABLED 1 846 #endif 847 #ifdef CONFIG_NRFX_UART0 848 #define NRFX_UART0_ENABLED 1 849 #endif 850 851 #ifdef CONFIG_NRFX_UARTE 852 #define NRFX_UARTE_ENABLED 1 853 #endif 854 #ifdef CONFIG_NRFX_UARTE_LOG 855 #define NRFX_UARTE_CONFIG_LOG_ENABLED 1 856 #endif 857 #ifdef CONFIG_NRFX_UARTE0 858 #define NRFX_UARTE0_ENABLED 1 859 #endif 860 #ifdef CONFIG_NRFX_UARTE1 861 #define NRFX_UARTE1_ENABLED 1 862 #endif 863 #ifdef CONFIG_NRFX_UARTE2 864 #define NRFX_UARTE2_ENABLED 1 865 #endif 866 #ifdef CONFIG_NRFX_UARTE3 867 #define NRFX_UARTE3_ENABLED 1 868 #endif 869 #ifdef CONFIG_NRFX_UARTE00 870 #define NRFX_UARTE00_ENABLED 1 871 #endif 872 #ifdef CONFIG_NRFX_UARTE20 873 #define NRFX_UARTE20_ENABLED 1 874 #endif 875 #ifdef CONFIG_NRFX_UARTE21 876 #define NRFX_UARTE21_ENABLED 1 877 #endif 878 #ifdef CONFIG_NRFX_UARTE22 879 #define NRFX_UARTE22_ENABLED 1 880 #endif 881 #ifdef CONFIG_NRFX_UARTE30 882 #define NRFX_UARTE30_ENABLED 1 883 #endif 884 #ifdef CONFIG_NRFX_UARTE120 885 #define NRFX_UARTE120_ENABLED 1 886 #endif 887 #ifdef CONFIG_NRFX_UARTE130 888 #define NRFX_UARTE130_ENABLED 1 889 #endif 890 #ifdef CONFIG_NRFX_UARTE131 891 #define NRFX_UARTE131_ENABLED 1 892 #endif 893 #ifdef CONFIG_NRFX_UARTE132 894 #define NRFX_UARTE132_ENABLED 1 895 #endif 896 #ifdef CONFIG_NRFX_UARTE133 897 #define NRFX_UARTE133_ENABLED 1 898 #endif 899 #ifdef CONFIG_NRFX_UARTE134 900 #define NRFX_UARTE134_ENABLED 1 901 #endif 902 #ifdef CONFIG_NRFX_UARTE135 903 #define NRFX_UARTE135_ENABLED 1 904 #endif 905 #ifdef CONFIG_NRFX_UARTE136 906 #define NRFX_UARTE136_ENABLED 1 907 #endif 908 #ifdef CONFIG_NRFX_UARTE137 909 #define NRFX_UARTE137_ENABLED 1 910 #endif 911 #ifdef CONFIG_NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 912 #define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 1 913 #endif 914 #ifdef CONFIG_NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 915 #define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 1 916 #endif 917 #ifdef CONFIG_NRFX_UARTE_CONFIG_TX_LINK 918 #define NRFX_UARTE_CONFIG_TX_LINK 1 919 #endif 920 #ifdef CONFIG_NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 921 #define NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 1 922 #endif 923 924 #ifdef CONFIG_NRFX_USBREG 925 #define NRFX_USBREG_ENABLED 1 926 #endif 927 #ifdef CONFIG_NRFX_USBREG_LOG 928 #define NRFX_USBREG_CONFIG_LOG_ENABLED 1 929 #endif 930 931 #ifdef CONFIG_NRFX_WDT 932 #define NRFX_WDT_ENABLED 1 933 #endif 934 #ifdef CONFIG_WDT_NRFX_NO_IRQ 935 #define NRFX_WDT_CONFIG_NO_IRQ 1 936 #endif 937 #ifdef CONFIG_NRFX_WDT_LOG 938 #define NRFX_WDT_CONFIG_LOG_ENABLED 1 939 #endif 940 #ifdef CONFIG_NRFX_WDT0 941 #define NRFX_WDT0_ENABLED 1 942 #endif 943 #ifdef CONFIG_NRFX_WDT1 944 #define NRFX_WDT1_ENABLED 1 945 #endif 946 #ifdef CONFIG_NRFX_WDT30 947 #define NRFX_WDT30_ENABLED 1 948 #endif 949 #ifdef CONFIG_NRFX_WDT31 950 #define NRFX_WDT31_ENABLED 1 951 #endif 952 #ifdef CONFIG_NRFX_WDT010 953 #define NRFX_WDT010_ENABLED 1 954 #endif 955 #ifdef CONFIG_NRFX_WDT011 956 #define NRFX_WDT011_ENABLED 1 957 #endif 958 #ifdef CONFIG_NRFX_WDT130 959 #define NRFX_WDT130_ENABLED 1 960 #endif 961 #ifdef CONFIG_NRFX_WDT131 962 #define NRFX_WDT131_ENABLED 1 963 #endif 964 #ifdef CONFIG_NRFX_WDT132 965 #define NRFX_WDT132_ENABLED 1 966 #endif 967 968 #ifdef CONFIG_NRF52_ANOMALY_109_WORKAROUND 969 #define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 970 #define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 971 #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 972 #define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 973 #define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE \ 974 CONFIG_NRF52_ANOMALY_109_WORKAROUND_EGU_INSTANCE 975 #endif 976 977 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_global) || \ 978 DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_local) 979 #ifndef NRFX_DPPI_ENABLED 980 #define NRFX_DPPI_ENABLED 1 981 #endif 982 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_dppic_global) || ... */ 983 984 /* If local or global DPPIC peripherals are used, provide the following macro 985 * definitions required by the interconnect/ipct layer: 986 * - NRFX_IPCTx_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 987 * - NRFX_IPCTx_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) 988 * - NRFX_IPCT_PUB_OR_SUB_MASK(inst_num) 989 * - NRFX_IPCTx_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) 990 * - NRFX_INTERCONNECT_IPCT_GLOBAL_DEFINE 991 * - NRFX_INTERCONNECT_IPCT_LOCAL_DEFINE 992 * based on information from devicetree. 993 */ 994 #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_global) || \ 995 DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_local) 996 /* Channels masks generation. */ 997 #define NRFX_CONFIG_IPCT_MASK_DT(node_id) \ 998 COND_CODE_1(DT_NODE_HAS_PROP(node_id, owned_channels), \ 999 (NRFX_CONFIG_MASK_DT(node_id, owned_channels)), \ 1000 (COND_CODE_1(DT_NODE_HAS_COMPAT(node_id, nordic_nrf_ipct_local), \ 1001 (BIT_MASK(DT_PROP(node_id, channels))), (0)))) 1002 1003 #if defined(NRF_APPLICATION) 1004 #define NRFX_CONFIG_IPCT_LOCAL_NODE DT_NODELABEL(cpuapp_ipct) 1005 #elif defined(NRF_RADIOCORE) 1006 #define NRFX_CONFIG_IPCT_LOCAL_NODE DT_NODELABEL(cpurad_ipct) 1007 #endif 1008 #define NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num) \ 1009 COND_CODE_1(IS_EMPTY(inst_num), \ 1010 (NRFX_CONFIG_IPCT_LOCAL_NODE), \ 1011 (DT_NODELABEL(_CONCAT(ipct, inst_num)))) 1012 1013 #define NRFX_IPCTx_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1014 NRFX_CONFIG_IPCT_MASK_DT(NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num)) 1015 1016 #define NRFX_IPCTx_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 1017 NRFX_CONFIG_IPCT_MASK_DT(NRFX_CONFIG_IPCT_NODE_BY_INST_NUM(inst_num)) 1018 1019 #define NRFX_IPCT_PUB_OR_SUB_MASK(inst_num) \ 1020 COND_CODE_1(IS_EMPTY(inst_num), \ 1021 (DT_NODE_HAS_STATUS_OKAY(NRFX_CONFIG_IPCT_LOCAL_NODE)), \ 1022 (DT_NODE_HAS_PROP(DT_NODELABEL(_CONCAT(ipct, inst_num)), owned_channels))) 1023 1024 /* Variables names generation. */ 1025 #define NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(node_id) _CONCAT(_CONCAT(m_, node_id), _channels) 1026 #define NRFX_IPCTx_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) \ 1027 COND_CODE_1(IS_EMPTY(inst_num), \ 1028 (NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(NRFX_CONFIG_IPCT_LOCAL_NODE)), \ 1029 (NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(DT_NODELABEL(_CONCAT(ipct, inst_num))))) 1030 1031 /* Variables entries generation. */ 1032 #define NRFX_CONFIG_IPCT_CHANNELS_ENTRY(node_id) \ 1033 static nrfx_atomic_t NRFX_CONFIG_IPCT_CHANNELS_ENTRY_NAME(node_id) \ 1034 __attribute__((used)) = \ 1035 NRFX_CONFIG_IPCT_MASK_DT(node_id); 1036 #define NRFX_INTERCONNECT_IPCT_LOCAL_DEFINE \ 1037 DT_FOREACH_STATUS_OKAY(nordic_nrf_ipct_local, NRFX_CONFIG_IPCT_CHANNELS_ENTRY) 1038 #define NRFX_INTERCONNECT_IPCT_GLOBAL_DEFINE \ 1039 DT_FOREACH_STATUS_OKAY(nordic_nrf_ipct_global, NRFX_CONFIG_IPCT_CHANNELS_ENTRY) 1040 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_ipct_global) || ... */ 1041 1042 #endif /* NRFX_KCONFIG_H__ */ 1043
