Searched refs:NPCX_MDMA_CTL_MDMAEN (Results 1 – 3 of 3) sorted by relevance
473 if (IS_BIT_SET(mdma_reg_base->MDMA_CTL0, NPCX_MDMA_CTL_MDMAEN)) { in uart_npcx_async_rx_dma_get_status()539 if (IS_BIT_SET(mdma_reg_base->MDMA_CTL1, NPCX_MDMA_CTL_MDMAEN)) { in uart_npcx_async_tx_dma_get_status()579 mdma_reg_base->MDMA_CTL1 |= BIT(NPCX_MDMA_CTL_MDMAEN) | BIT(NPCX_MDMA_CTL_SIEN); in uart_npcx_async_tx()602 mdma_reg_base->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in uart_npcx_async_tx_abort()662 mdma_reg_base->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_MDMAEN) | BIT(NPCX_MDMA_CTL_SIEN); in uart_npcx_async_rx_enable()726 mdma_reg_base->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in uart_npcx_async_rx_disable()786 mdma_reg_base->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_MDMAEN) | BIT(NPCX_MDMA_CTL_SIEN); in uart_npcx_async_dma_load_new_rx_buf()
848 mdma_inst->MDMA_CTL1 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ in npcx_i3c_xfer_write_fifo_dma()906 mdma_inst->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ in npcx_i3c_xfer_read_fifo_dma()2049 mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in npcx_i3c_target_disable_mdmafb()2068 if (IS_BIT_SET(mdma_inst->MDMA_CTL0, NPCX_MDMA_CTL_MDMAEN) != 0) { in npcx_i3c_target_enable_mdmafb()2069 mdma_inst->MDMA_CTL0 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in npcx_i3c_target_enable_mdmafb()2085 mdma_inst->MDMA_CTL0 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ in npcx_i3c_target_enable_mdmafb()2094 mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in npcx_i3c_target_disable_mdmatb()2113 if (IS_BIT_SET(mdma_inst->MDMA_CTL1, NPCX_MDMA_CTL_MDMAEN) != 0) { in npcx_i3c_target_enable_mdmatb()2114 mdma_inst->MDMA_CTL1 &= ~BIT(NPCX_MDMA_CTL_MDMAEN); in npcx_i3c_target_enable_mdmatb()2135 mdma_inst->MDMA_CTL1 |= BIT(NPCX_MDMA_CTL_MDMAEN); /* Start DMA transfer */ in npcx_i3c_target_enable_mdmatb()
2240 #define NPCX_MDMA_CTL_MDMAEN 0 macro
