1 /*
2  * Copyright (c) 2021,2025 Henrik Brix Andersen <henrik@brixandersen.dk>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef _NEORV32_SOC_H
8 #define _NEORV32_SOC_H
9 
10 /* System information (SYSINFO) register offsets */
11 #define NEORV32_SYSINFO_CLK         0x00U
12 #define NEORV32_SYSINFO_MISC        0x04U
13 #define NEORV32_SYSINFO_SOC         0x08U
14 #define NEORV32_SYSINFO_CACHE       0x0cU
15 
16 /* System information (SYSINFO) MISC register bits */
17 #define NEORV32_SYSINFO_MISC_IMEM GENMASK(7, 0)
18 #define NEORV32_SYSINFO_MISC_DMEM GENMASK(15, 8)
19 #define NEORV32_SYSINFO_MISC_HART GENMASK(23, 16)
20 #define NEORV32_SYSINFO_MISC_BOOT GENMASK(31, 24)
21 
22 /* System information (SYSINFO) SOC register bits */
23 #define NEORV32_SYSINFO_SOC_BOOTLOADER   BIT(0)
24 #define NEORV32_SYSINFO_SOC_XBUS         BIT(1)
25 #define NEORV32_SYSINFO_SOC_MEM_INT_IMEM BIT(2)
26 #define NEORV32_SYSINFO_SOC_MEM_INT_DMEM BIT(3)
27 #define NEORV32_SYSINFO_SOC_OCD          BIT(4)
28 #define NEORV32_SYSINFO_SOC_ICACHE       BIT(5)
29 #define NEORV32_SYSINFO_SOC_DCACHE       BIT(6)
30 #define NEORV32_SYSINFO_SOC_XBUS_CACHE   BIT(8)
31 #define NEORV32_SYSINFO_SOC_OCD_AUTH     BIT(11)
32 #define NEORV32_SYSINFO_SOC_IMEM_ROM     BIT(12)
33 #define NEORV32_SYSINFO_SOC_IO_TWD       BIT(13)
34 #define NEORV32_SYSINFO_SOC_IO_DMA       BIT(14)
35 #define NEORV32_SYSINFO_SOC_IO_GPIO      BIT(15)
36 #define NEORV32_SYSINFO_SOC_IO_CLINT     BIT(16)
37 #define NEORV32_SYSINFO_SOC_IO_UART0     BIT(17)
38 #define NEORV32_SYSINFO_SOC_IO_SPI       BIT(18)
39 #define NEORV32_SYSINFO_SOC_IO_TWI       BIT(19)
40 #define NEORV32_SYSINFO_SOC_IO_PWM       BIT(20)
41 #define NEORV32_SYSINFO_SOC_IO_WDT       BIT(21)
42 #define NEORV32_SYSINFO_SOC_IO_CFS       BIT(22)
43 #define NEORV32_SYSINFO_SOC_IO_TRNG      BIT(23)
44 #define NEORV32_SYSINFO_SOC_IO_SDI       BIT(24)
45 #define NEORV32_SYSINFO_SOC_IO_UART1     BIT(25)
46 #define NEORV32_SYSINFO_SOC_IO_NEOLED    BIT(26)
47 #define NEORV32_SYSINFO_SOC_IO_GPTMR     BIT(28)
48 #define NEORV32_SYSINFO_SOC_IO_SLINK     BIT(29)
49 #define NEORV32_SYSINFO_SOC_IO_ONEWIRE   BIT(30)
50 #define NEORV32_SYSINFO_SOC_IO_CRC       BIT(31)
51 
52 /* System information (SYSINFO) CACHE register bits */
53 #define NEORV32_SYSINFO_CACHE_INST_BLOCK_SIZE GENMASK(3, 0)
54 #define NEORV32_SYSINFO_CACHE_INST_NUM_BLOCKS GENMASK(7, 4)
55 #define NEORV32_SYSINFO_CACHE_DATA_BLOCK_SIZE GENMASK(11, 8)
56 #define NEORV32_SYSINFO_CACHE_DATA_NUM_BLOCKS GENMASK(15, 12)
57 #define NEORV32_SYSINFO_CACHE_XBUS_BLOCK_SIZE GENMASK(27, 24)
58 #define NEORV32_SYSINFO_CACHE_XBUS_NUM_BLOCKS GENMASK(31, 28)
59 
60 #endif /* _NEORV32_SOC_H */
61