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Searched refs:MUX_SEL5_OFFSET (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/pinctrl/
Dpinctrl_emsdp.c28 #define MUX_SEL5_OFFSET (20) macro
37 #define MUX_SEL5_MASK (0xf << MUX_SEL5_OFFSET)
78 #define PM_C_CFG1_GPIO ((0) << MUX_SEL5_OFFSET)
98 #define ARDUINO_CFG5_GPIO ((0) << MUX_SEL5_OFFSET)
99 #define ARDUINO_CFG5_SPI ((1) << MUX_SEL5_OFFSET) /* io_spi_mst0, cs_0 */
100 #define ARDUINO_CFG5_PWM1 ((2) << MUX_SEL5_OFFSET)
101 #define ARDUINO_CFG5_PWM2 ((3) << MUX_SEL5_OFFSET)
102 #define ARDUINO_CFG5_PWM3 ((4) << MUX_SEL5_OFFSET)