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Searched refs:MUX_SEL2_OFFSET (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/pinctrl/
Dpinctrl_emsdp.c25 #define MUX_SEL2_OFFSET (8) macro
34 #define MUX_SEL2_MASK (0xf << MUX_SEL2_OFFSET)
57 #define PM_B_CFG0_GPIO ((0) << MUX_SEL2_OFFSET)
58 #define PM_B_CFG0_I2C ((1) << MUX_SEL2_OFFSET) /* io_i2c_mst2 */
59 #define PM_B_CFG0_SPI ((2) << MUX_SEL2_OFFSET) /* io_spi_mst1, cs_1 */
60 #define PM_B_CFG0_UART2a ((3) << MUX_SEL2_OFFSET) /* io_uart2 */
61 #define PM_B_CFG0_UART2b ((4) << MUX_SEL2_OFFSET) /* io_uart2 */
62 #define PM_B_CFG0_PWM1 ((5) << MUX_SEL2_OFFSET)
63 #define PM_B_CFG0_PWM2 ((6) << MUX_SEL2_OFFSET)
89 #define ARDUINO_CFG2_GPIO ((0) << MUX_SEL2_OFFSET)
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