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Searched refs:MT_STRONGLY_ORDERED (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/soc/xlnx/zynq7000/xc7zxxx/
Dsoc.c30 MT_STRONGLY_ORDERED | MPERM_R | MPERM_X),
34 MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
38 MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
/Zephyr-latest/soc/xlnx/zynq7000/xc7zxxxs/
Dsoc.c30 MT_STRONGLY_ORDERED | MPERM_R | MPERM_X),
34 MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
38 MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
/Zephyr-latest/soc/intel/intel_socfpga_std/cyclonev/
Dsoc.c43 MT_STRONGLY_ORDERED | MPERM_R | MPERM_X),
48 MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
/Zephyr-latest/include/zephyr/arch/arm/mmu/
Darm_mmu.h28 #define MT_STRONGLY_ORDERED BIT(0) macro
/Zephyr-latest/arch/arm/core/mmu/
Darm_mmu.c108 .attrs = MT_STRONGLY_ORDERED |
291 if (attrs & MT_STRONGLY_ORDERED) { in arm_mmu_convert_attr_flags()