Searched refs:MII_BMCR_RESET (Results 1 – 8 of 8) sorted by relevance
/Zephyr-latest/include/zephyr/net/ |
D | mii.h | 56 #define MII_BMCR_RESET (1 << 15) macro
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/Zephyr-latest/drivers/ethernet/ |
D | phy_gecko.c | 116 retval = phy_write(phy, MII_BMCR, MII_BMCR_RESET); in phy_soft_reset() 136 } while (phy_reg & MII_BMCR_RESET); in phy_soft_reset()
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/Zephyr-latest/drivers/ethernet/phy/ |
D | phy_mii.c | 100 if (phy_mii_reg_write(dev, MII_BMCR, MII_BMCR_RESET) < 0) { in reset() 118 } while (value & MII_BMCR_RESET); in reset()
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D | phy_realtek_rtl8211f.c | 145 ret = phy_rt_rtl8211f_write(dev, MII_BMCR, MII_BMCR_RESET); in phy_rt_rtl8211f_reset() 161 } while (reg_val & MII_BMCR_RESET); in phy_rt_rtl8211f_reset()
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D | phy_qualcomm_ar8031.c | 384 ret = qc_ar8031_write(dev, MII_BMCR, MII_BMCR_RESET); in qc_ar8031_init()
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D | phy_microchip_ksz8081.c | 308 ret = phy_mc_ksz8081_write(dev, MII_BMCR, MII_BMCR_RESET); in phy_mc_ksz8081_reset()
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D | phy_ti_dp83825.c | 345 ret = phy_ti_dp83825_write(dev, MII_BMCR, MII_BMCR_RESET); in phy_ti_dp83825_reset()
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D | phy_adin2111.c | 367 ret = phy_adin2111_c22_write(dev, MII_BMCR, MII_BMCR_RESET); in phy_adin2111_reset()
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