Searched refs:MCR20A_PHY_CTRL1 (Results 1 – 3 of 3) sorted by relevance
80 DEFINE_DREG_READ(phy_ctrl1, MCR20A_PHY_CTRL1)101 DEFINE_DREG_WRITE(phy_ctrl1, MCR20A_PHY_CTRL1)146 DEFINE_BITS_SET(phy_ctrl1_xcvseq, MCR20A_PHY_CTRL1, _XCVSEQ)
618 uint8_t seq = dregs[MCR20A_PHY_CTRL1] & MCR20A_PHY_CTRL1_XCVSEQ_MASK; in irqsts1_event()691 dregs[MCR20A_PHY_CTRL1] &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in irqsts1_event()692 dregs[MCR20A_PHY_CTRL1] |= new_seq; in irqsts1_event()716 dregs[MCR20A_PHY_CTRL1] &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in irqsts3_event()717 dregs[MCR20A_PHY_CTRL1] |= MCR20A_XCVSEQ_RECEIVE; in irqsts3_event()758 ctrl1 = dregs[MCR20A_PHY_CTRL1]; in mcr20a_thread_main()
57 #define MCR20A_PHY_CTRL1 (0x3) macro
