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Searched refs:LR (Results 1 – 13 of 13) sorted by relevance

/Zephyr-latest/include/zephyr/arch/arm/
Dgdbstub.h53 LR, enumerator
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Darm_cortex_m.py33 LR = 14 variable in RegNum
69 self.registers[RegNum.LR] = tu[5]
151 thread_registers[RegNum.LR] = tu[5]
Darm64.py48 LR = 30 # X30 Link Register(LR) variable in RegNum
102 self.registers[RegNum.LR] = tu[19]
/Zephyr-latest/soc/neorv32/
DKconfig19 # NEORV32 RISC-V ISA A extension implements only LR/SC, not AMO
/Zephyr-latest/arch/arm/core/
Dgdbstub.c68 ctx.registers[LR] = esf->basic.lr; in z_gdb_entry()
85 esf->basic.lr = ctx.registers[LR]; in z_gdb_entry()
/Zephyr-latest/doc/services/portability/posix/implementation/
Dindex.rst50 rankdir=LR;
64 rankdir=LR;
/Zephyr-latest/doc/connectivity/networking/api/
Dieee802154.rst14 wireless personal area networks (LR-WPANs). For a more detailed overview of this
/Zephyr-latest/doc/services/pm/
Dpower_domain.rst36 rankdir="LR"
Dsystem.rst64 {rankdir=LR k_cpu_idle; forced_state}
Ddevice.rst169 rankdir=LR;
/Zephyr-latest/doc/security/
Dreporting.rst33 rankdir = LR;
/Zephyr-latest/doc/contribute/documentation/
Dgeneration.rst46 rankdir=LR
Dguidelines.rst754 rankdir=LR;
765 rankdir=LR;