1 /* 2 * Copyright (c) 2024 Silicon Laboratories Inc. 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Pin Control for Silicon Labs XG23 devices 6 * 7 * This file was generated by the script gen_pinctrl.py in the hal_silabs module. 8 * Do not manually edit. 9 */ 10 11 #ifndef ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG23_PINCTRL_H_ 12 #define ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG23_PINCTRL_H_ 13 14 #include <dt-bindings/pinctrl/silabs-pinctrl-dbus.h> 15 16 #define SILABS_DBUS_ACMP0_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 16, 1, 0, 1) 17 18 #define SILABS_DBUS_ACMP1_ACMPOUT(port, pin) SILABS_DBUS(port, pin, 19, 1, 0, 1) 19 20 #define SILABS_DBUS_CMU_CLKOUT0(port, pin) SILABS_DBUS(port, pin, 22, 1, 0, 2) 21 #define SILABS_DBUS_CMU_CLKOUT1(port, pin) SILABS_DBUS(port, pin, 22, 1, 1, 3) 22 #define SILABS_DBUS_CMU_CLKOUT2(port, pin) SILABS_DBUS(port, pin, 22, 1, 2, 4) 23 #define SILABS_DBUS_CMU_CLKIN0(port, pin) SILABS_DBUS(port, pin, 22, 0, 0, 1) 24 25 #define SILABS_DBUS_EUSART0_CS(port, pin) SILABS_DBUS(port, pin, 33, 1, 0, 1) 26 #define SILABS_DBUS_EUSART0_RTS(port, pin) SILABS_DBUS(port, pin, 33, 1, 1, 3) 27 #define SILABS_DBUS_EUSART0_RX(port, pin) SILABS_DBUS(port, pin, 33, 1, 2, 4) 28 #define SILABS_DBUS_EUSART0_SCLK(port, pin) SILABS_DBUS(port, pin, 33, 1, 3, 5) 29 #define SILABS_DBUS_EUSART0_TX(port, pin) SILABS_DBUS(port, pin, 33, 1, 4, 6) 30 #define SILABS_DBUS_EUSART0_CTS(port, pin) SILABS_DBUS(port, pin, 33, 0, 0, 2) 31 32 #define SILABS_DBUS_EUSART1_CS(port, pin) SILABS_DBUS(port, pin, 41, 1, 0, 1) 33 #define SILABS_DBUS_EUSART1_RTS(port, pin) SILABS_DBUS(port, pin, 41, 1, 1, 3) 34 #define SILABS_DBUS_EUSART1_RX(port, pin) SILABS_DBUS(port, pin, 41, 1, 2, 4) 35 #define SILABS_DBUS_EUSART1_SCLK(port, pin) SILABS_DBUS(port, pin, 41, 1, 3, 5) 36 #define SILABS_DBUS_EUSART1_TX(port, pin) SILABS_DBUS(port, pin, 41, 1, 4, 6) 37 #define SILABS_DBUS_EUSART1_CTS(port, pin) SILABS_DBUS(port, pin, 41, 0, 0, 2) 38 39 #define SILABS_DBUS_EUSART2_CS(port, pin) SILABS_DBUS(port, pin, 49, 1, 0, 1) 40 #define SILABS_DBUS_EUSART2_RTS(port, pin) SILABS_DBUS(port, pin, 49, 1, 1, 3) 41 #define SILABS_DBUS_EUSART2_RX(port, pin) SILABS_DBUS(port, pin, 49, 1, 2, 4) 42 #define SILABS_DBUS_EUSART2_SCLK(port, pin) SILABS_DBUS(port, pin, 49, 1, 3, 5) 43 #define SILABS_DBUS_EUSART2_TX(port, pin) SILABS_DBUS(port, pin, 49, 1, 4, 6) 44 #define SILABS_DBUS_EUSART2_CTS(port, pin) SILABS_DBUS(port, pin, 49, 0, 0, 2) 45 46 #define SILABS_DBUS_PTI_DCLK(port, pin) SILABS_DBUS(port, pin, 57, 1, 0, 1) 47 #define SILABS_DBUS_PTI_DFRAME(port, pin) SILABS_DBUS(port, pin, 57, 1, 1, 2) 48 #define SILABS_DBUS_PTI_DOUT(port, pin) SILABS_DBUS(port, pin, 57, 1, 2, 3) 49 50 #define SILABS_DBUS_I2C0_SCL(port, pin) SILABS_DBUS(port, pin, 62, 1, 0, 1) 51 #define SILABS_DBUS_I2C0_SDA(port, pin) SILABS_DBUS(port, pin, 62, 1, 1, 2) 52 53 #define SILABS_DBUS_I2C1_SCL(port, pin) SILABS_DBUS(port, pin, 66, 1, 0, 1) 54 #define SILABS_DBUS_I2C1_SDA(port, pin) SILABS_DBUS(port, pin, 66, 1, 1, 2) 55 56 #define SILABS_DBUS_KEYSCAN_COLOUT0(port, pin) SILABS_DBUS(port, pin, 70, 1, 0, 1) 57 #define SILABS_DBUS_KEYSCAN_COLOUT1(port, pin) SILABS_DBUS(port, pin, 70, 1, 1, 2) 58 #define SILABS_DBUS_KEYSCAN_COLOUT2(port, pin) SILABS_DBUS(port, pin, 70, 1, 2, 3) 59 #define SILABS_DBUS_KEYSCAN_COLOUT3(port, pin) SILABS_DBUS(port, pin, 70, 1, 3, 4) 60 #define SILABS_DBUS_KEYSCAN_COLOUT4(port, pin) SILABS_DBUS(port, pin, 70, 1, 4, 5) 61 #define SILABS_DBUS_KEYSCAN_COLOUT5(port, pin) SILABS_DBUS(port, pin, 70, 1, 5, 6) 62 #define SILABS_DBUS_KEYSCAN_COLOUT6(port, pin) SILABS_DBUS(port, pin, 70, 1, 6, 7) 63 #define SILABS_DBUS_KEYSCAN_COLOUT7(port, pin) SILABS_DBUS(port, pin, 70, 1, 7, 8) 64 #define SILABS_DBUS_KEYSCAN_ROWSENSE0(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 9) 65 #define SILABS_DBUS_KEYSCAN_ROWSENSE1(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 10) 66 #define SILABS_DBUS_KEYSCAN_ROWSENSE2(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 11) 67 #define SILABS_DBUS_KEYSCAN_ROWSENSE3(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 12) 68 #define SILABS_DBUS_KEYSCAN_ROWSENSE4(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 13) 69 #define SILABS_DBUS_KEYSCAN_ROWSENSE5(port, pin) SILABS_DBUS(port, pin, 70, 0, 0, 14) 70 71 #define SILABS_DBUS_LESENSE_CH0OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 0, 1) 72 #define SILABS_DBUS_LESENSE_CH1OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 1, 2) 73 #define SILABS_DBUS_LESENSE_CH2OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 2, 3) 74 #define SILABS_DBUS_LESENSE_CH3OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 3, 4) 75 #define SILABS_DBUS_LESENSE_CH4OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 4, 5) 76 #define SILABS_DBUS_LESENSE_CH5OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 5, 6) 77 #define SILABS_DBUS_LESENSE_CH6OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 6, 7) 78 #define SILABS_DBUS_LESENSE_CH7OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 7, 8) 79 #define SILABS_DBUS_LESENSE_CH8OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 8, 9) 80 #define SILABS_DBUS_LESENSE_CH9OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 9, 10) 81 #define SILABS_DBUS_LESENSE_CH10OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 10, 11) 82 #define SILABS_DBUS_LESENSE_CH11OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 11, 12) 83 #define SILABS_DBUS_LESENSE_CH12OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 12, 13) 84 #define SILABS_DBUS_LESENSE_CH13OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 13, 14) 85 #define SILABS_DBUS_LESENSE_CH14OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 14, 15) 86 #define SILABS_DBUS_LESENSE_CH15OUT(port, pin) SILABS_DBUS(port, pin, 86, 1, 15, 16) 87 88 #define SILABS_DBUS_LETIMER0_OUT0(port, pin) SILABS_DBUS(port, pin, 104, 1, 0, 1) 89 #define SILABS_DBUS_LETIMER0_OUT1(port, pin) SILABS_DBUS(port, pin, 104, 1, 1, 2) 90 91 #define SILABS_DBUS_MODEM_ANT0(port, pin) SILABS_DBUS(port, pin, 108, 1, 0, 1) 92 #define SILABS_DBUS_MODEM_ANT1(port, pin) SILABS_DBUS(port, pin, 108, 1, 1, 2) 93 #define SILABS_DBUS_MODEM_ANTROLLOVER(port, pin) SILABS_DBUS(port, pin, 108, 1, 2, 3) 94 #define SILABS_DBUS_MODEM_ANTRR0(port, pin) SILABS_DBUS(port, pin, 108, 1, 3, 4) 95 #define SILABS_DBUS_MODEM_ANTRR1(port, pin) SILABS_DBUS(port, pin, 108, 1, 4, 5) 96 #define SILABS_DBUS_MODEM_ANTRR2(port, pin) SILABS_DBUS(port, pin, 108, 1, 5, 6) 97 #define SILABS_DBUS_MODEM_ANTRR3(port, pin) SILABS_DBUS(port, pin, 108, 1, 6, 7) 98 #define SILABS_DBUS_MODEM_ANTRR4(port, pin) SILABS_DBUS(port, pin, 108, 1, 7, 8) 99 #define SILABS_DBUS_MODEM_ANTRR5(port, pin) SILABS_DBUS(port, pin, 108, 1, 8, 9) 100 #define SILABS_DBUS_MODEM_ANTSWEN(port, pin) SILABS_DBUS(port, pin, 108, 1, 9, 10) 101 #define SILABS_DBUS_MODEM_ANTSWUS(port, pin) SILABS_DBUS(port, pin, 108, 1, 10, 11) 102 #define SILABS_DBUS_MODEM_ANTTRIG(port, pin) SILABS_DBUS(port, pin, 108, 1, 11, 12) 103 #define SILABS_DBUS_MODEM_ANTTRIGSTOP(port, pin) SILABS_DBUS(port, pin, 108, 1, 12, 13) 104 #define SILABS_DBUS_MODEM_DCLK(port, pin) SILABS_DBUS(port, pin, 108, 1, 13, 14) 105 #define SILABS_DBUS_MODEM_DOUT(port, pin) SILABS_DBUS(port, pin, 108, 1, 14, 16) 106 #define SILABS_DBUS_MODEM_DIN(port, pin) SILABS_DBUS(port, pin, 108, 0, 0, 15) 107 108 #define SILABS_DBUS_PCNT0_S0IN(port, pin) SILABS_DBUS(port, pin, 127, 0, 0, 0) 109 #define SILABS_DBUS_PCNT0_S1IN(port, pin) SILABS_DBUS(port, pin, 127, 0, 0, 1) 110 111 #define SILABS_DBUS_PRS0_ASYNCH0(port, pin) SILABS_DBUS(port, pin, 130, 1, 0, 1) 112 #define SILABS_DBUS_PRS0_ASYNCH1(port, pin) SILABS_DBUS(port, pin, 130, 1, 1, 2) 113 #define SILABS_DBUS_PRS0_ASYNCH2(port, pin) SILABS_DBUS(port, pin, 130, 1, 2, 3) 114 #define SILABS_DBUS_PRS0_ASYNCH3(port, pin) SILABS_DBUS(port, pin, 130, 1, 3, 4) 115 #define SILABS_DBUS_PRS0_ASYNCH4(port, pin) SILABS_DBUS(port, pin, 130, 1, 4, 5) 116 #define SILABS_DBUS_PRS0_ASYNCH5(port, pin) SILABS_DBUS(port, pin, 130, 1, 5, 6) 117 #define SILABS_DBUS_PRS0_ASYNCH6(port, pin) SILABS_DBUS(port, pin, 130, 1, 6, 7) 118 #define SILABS_DBUS_PRS0_ASYNCH7(port, pin) SILABS_DBUS(port, pin, 130, 1, 7, 8) 119 #define SILABS_DBUS_PRS0_ASYNCH8(port, pin) SILABS_DBUS(port, pin, 130, 1, 8, 9) 120 #define SILABS_DBUS_PRS0_ASYNCH9(port, pin) SILABS_DBUS(port, pin, 130, 1, 9, 10) 121 #define SILABS_DBUS_PRS0_ASYNCH10(port, pin) SILABS_DBUS(port, pin, 130, 1, 10, 11) 122 #define SILABS_DBUS_PRS0_ASYNCH11(port, pin) SILABS_DBUS(port, pin, 130, 1, 11, 12) 123 #define SILABS_DBUS_PRS0_SYNCH0(port, pin) SILABS_DBUS(port, pin, 130, 1, 12, 13) 124 #define SILABS_DBUS_PRS0_SYNCH1(port, pin) SILABS_DBUS(port, pin, 130, 1, 13, 14) 125 #define SILABS_DBUS_PRS0_SYNCH2(port, pin) SILABS_DBUS(port, pin, 130, 1, 14, 15) 126 #define SILABS_DBUS_PRS0_SYNCH3(port, pin) SILABS_DBUS(port, pin, 130, 1, 15, 16) 127 128 #define SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(port, pin) SILABS_DBUS(port, pin, 172, 0, 0, 0) 129 130 #define SILABS_DBUS_TIMER0_CC0(port, pin) SILABS_DBUS(port, pin, 174, 1, 0, 1) 131 #define SILABS_DBUS_TIMER0_CC1(port, pin) SILABS_DBUS(port, pin, 174, 1, 1, 2) 132 #define SILABS_DBUS_TIMER0_CC2(port, pin) SILABS_DBUS(port, pin, 174, 1, 2, 3) 133 #define SILABS_DBUS_TIMER0_CDTI0(port, pin) SILABS_DBUS(port, pin, 174, 1, 3, 4) 134 #define SILABS_DBUS_TIMER0_CDTI1(port, pin) SILABS_DBUS(port, pin, 174, 1, 4, 5) 135 #define SILABS_DBUS_TIMER0_CDTI2(port, pin) SILABS_DBUS(port, pin, 174, 1, 5, 6) 136 137 #define SILABS_DBUS_TIMER1_CC0(port, pin) SILABS_DBUS(port, pin, 182, 1, 0, 1) 138 #define SILABS_DBUS_TIMER1_CC1(port, pin) SILABS_DBUS(port, pin, 182, 1, 1, 2) 139 #define SILABS_DBUS_TIMER1_CC2(port, pin) SILABS_DBUS(port, pin, 182, 1, 2, 3) 140 #define SILABS_DBUS_TIMER1_CDTI0(port, pin) SILABS_DBUS(port, pin, 182, 1, 3, 4) 141 #define SILABS_DBUS_TIMER1_CDTI1(port, pin) SILABS_DBUS(port, pin, 182, 1, 4, 5) 142 #define SILABS_DBUS_TIMER1_CDTI2(port, pin) SILABS_DBUS(port, pin, 182, 1, 5, 6) 143 144 #define SILABS_DBUS_TIMER2_CC0(port, pin) SILABS_DBUS(port, pin, 190, 1, 0, 1) 145 #define SILABS_DBUS_TIMER2_CC1(port, pin) SILABS_DBUS(port, pin, 190, 1, 1, 2) 146 #define SILABS_DBUS_TIMER2_CC2(port, pin) SILABS_DBUS(port, pin, 190, 1, 2, 3) 147 #define SILABS_DBUS_TIMER2_CDTI0(port, pin) SILABS_DBUS(port, pin, 190, 1, 3, 4) 148 #define SILABS_DBUS_TIMER2_CDTI1(port, pin) SILABS_DBUS(port, pin, 190, 1, 4, 5) 149 #define SILABS_DBUS_TIMER2_CDTI2(port, pin) SILABS_DBUS(port, pin, 190, 1, 5, 6) 150 151 #define SILABS_DBUS_TIMER3_CC0(port, pin) SILABS_DBUS(port, pin, 198, 1, 0, 1) 152 #define SILABS_DBUS_TIMER3_CC1(port, pin) SILABS_DBUS(port, pin, 198, 1, 1, 2) 153 #define SILABS_DBUS_TIMER3_CC2(port, pin) SILABS_DBUS(port, pin, 198, 1, 2, 3) 154 #define SILABS_DBUS_TIMER3_CDTI0(port, pin) SILABS_DBUS(port, pin, 198, 1, 3, 4) 155 #define SILABS_DBUS_TIMER3_CDTI1(port, pin) SILABS_DBUS(port, pin, 198, 1, 4, 5) 156 #define SILABS_DBUS_TIMER3_CDTI2(port, pin) SILABS_DBUS(port, pin, 198, 1, 5, 6) 157 158 #define SILABS_DBUS_TIMER4_CC0(port, pin) SILABS_DBUS(port, pin, 206, 1, 0, 1) 159 #define SILABS_DBUS_TIMER4_CC1(port, pin) SILABS_DBUS(port, pin, 206, 1, 1, 2) 160 #define SILABS_DBUS_TIMER4_CC2(port, pin) SILABS_DBUS(port, pin, 206, 1, 2, 3) 161 #define SILABS_DBUS_TIMER4_CDTI0(port, pin) SILABS_DBUS(port, pin, 206, 1, 3, 4) 162 #define SILABS_DBUS_TIMER4_CDTI1(port, pin) SILABS_DBUS(port, pin, 206, 1, 4, 5) 163 #define SILABS_DBUS_TIMER4_CDTI2(port, pin) SILABS_DBUS(port, pin, 206, 1, 5, 6) 164 165 #define SILABS_DBUS_USART0_CS(port, pin) SILABS_DBUS(port, pin, 214, 1, 0, 1) 166 #define SILABS_DBUS_USART0_RTS(port, pin) SILABS_DBUS(port, pin, 214, 1, 1, 3) 167 #define SILABS_DBUS_USART0_RX(port, pin) SILABS_DBUS(port, pin, 214, 1, 2, 4) 168 #define SILABS_DBUS_USART0_CLK(port, pin) SILABS_DBUS(port, pin, 214, 1, 3, 5) 169 #define SILABS_DBUS_USART0_TX(port, pin) SILABS_DBUS(port, pin, 214, 1, 4, 6) 170 #define SILABS_DBUS_USART0_CTS(port, pin) SILABS_DBUS(port, pin, 214, 0, 0, 2) 171 172 #define ACMP0_ACMPOUT_PA0 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x0) 173 #define ACMP0_ACMPOUT_PA1 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x1) 174 #define ACMP0_ACMPOUT_PA2 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x2) 175 #define ACMP0_ACMPOUT_PA3 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x3) 176 #define ACMP0_ACMPOUT_PA4 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x4) 177 #define ACMP0_ACMPOUT_PA5 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x5) 178 #define ACMP0_ACMPOUT_PA6 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x6) 179 #define ACMP0_ACMPOUT_PA7 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x7) 180 #define ACMP0_ACMPOUT_PA8 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x8) 181 #define ACMP0_ACMPOUT_PA9 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0x9) 182 #define ACMP0_ACMPOUT_PA10 SILABS_DBUS_ACMP0_ACMPOUT(0x0, 0xa) 183 #define ACMP0_ACMPOUT_PB0 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x0) 184 #define ACMP0_ACMPOUT_PB1 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x1) 185 #define ACMP0_ACMPOUT_PB2 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x2) 186 #define ACMP0_ACMPOUT_PB3 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x3) 187 #define ACMP0_ACMPOUT_PB4 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x4) 188 #define ACMP0_ACMPOUT_PB5 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x5) 189 #define ACMP0_ACMPOUT_PB6 SILABS_DBUS_ACMP0_ACMPOUT(0x1, 0x6) 190 #define ACMP0_ACMPOUT_PC0 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x0) 191 #define ACMP0_ACMPOUT_PC1 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x1) 192 #define ACMP0_ACMPOUT_PC2 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x2) 193 #define ACMP0_ACMPOUT_PC3 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x3) 194 #define ACMP0_ACMPOUT_PC4 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x4) 195 #define ACMP0_ACMPOUT_PC5 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x5) 196 #define ACMP0_ACMPOUT_PC6 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x6) 197 #define ACMP0_ACMPOUT_PC7 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x7) 198 #define ACMP0_ACMPOUT_PC8 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x8) 199 #define ACMP0_ACMPOUT_PC9 SILABS_DBUS_ACMP0_ACMPOUT(0x2, 0x9) 200 #define ACMP0_ACMPOUT_PD0 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x0) 201 #define ACMP0_ACMPOUT_PD1 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x1) 202 #define ACMP0_ACMPOUT_PD2 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x2) 203 #define ACMP0_ACMPOUT_PD3 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x3) 204 #define ACMP0_ACMPOUT_PD4 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x4) 205 #define ACMP0_ACMPOUT_PD5 SILABS_DBUS_ACMP0_ACMPOUT(0x3, 0x5) 206 207 #define ACMP1_ACMPOUT_PA0 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x0) 208 #define ACMP1_ACMPOUT_PA1 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x1) 209 #define ACMP1_ACMPOUT_PA2 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x2) 210 #define ACMP1_ACMPOUT_PA3 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x3) 211 #define ACMP1_ACMPOUT_PA4 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x4) 212 #define ACMP1_ACMPOUT_PA5 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x5) 213 #define ACMP1_ACMPOUT_PA6 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x6) 214 #define ACMP1_ACMPOUT_PA7 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x7) 215 #define ACMP1_ACMPOUT_PA8 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x8) 216 #define ACMP1_ACMPOUT_PA9 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0x9) 217 #define ACMP1_ACMPOUT_PA10 SILABS_DBUS_ACMP1_ACMPOUT(0x0, 0xa) 218 #define ACMP1_ACMPOUT_PB0 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x0) 219 #define ACMP1_ACMPOUT_PB1 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x1) 220 #define ACMP1_ACMPOUT_PB2 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x2) 221 #define ACMP1_ACMPOUT_PB3 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x3) 222 #define ACMP1_ACMPOUT_PB4 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x4) 223 #define ACMP1_ACMPOUT_PB5 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x5) 224 #define ACMP1_ACMPOUT_PB6 SILABS_DBUS_ACMP1_ACMPOUT(0x1, 0x6) 225 #define ACMP1_ACMPOUT_PC0 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x0) 226 #define ACMP1_ACMPOUT_PC1 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x1) 227 #define ACMP1_ACMPOUT_PC2 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x2) 228 #define ACMP1_ACMPOUT_PC3 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x3) 229 #define ACMP1_ACMPOUT_PC4 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x4) 230 #define ACMP1_ACMPOUT_PC5 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x5) 231 #define ACMP1_ACMPOUT_PC6 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x6) 232 #define ACMP1_ACMPOUT_PC7 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x7) 233 #define ACMP1_ACMPOUT_PC8 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x8) 234 #define ACMP1_ACMPOUT_PC9 SILABS_DBUS_ACMP1_ACMPOUT(0x2, 0x9) 235 #define ACMP1_ACMPOUT_PD0 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x0) 236 #define ACMP1_ACMPOUT_PD1 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x1) 237 #define ACMP1_ACMPOUT_PD2 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x2) 238 #define ACMP1_ACMPOUT_PD3 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x3) 239 #define ACMP1_ACMPOUT_PD4 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x4) 240 #define ACMP1_ACMPOUT_PD5 SILABS_DBUS_ACMP1_ACMPOUT(0x3, 0x5) 241 242 #define CMU_CLKOUT0_PC0 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x0) 243 #define CMU_CLKOUT0_PC1 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x1) 244 #define CMU_CLKOUT0_PC2 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x2) 245 #define CMU_CLKOUT0_PC3 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x3) 246 #define CMU_CLKOUT0_PC4 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x4) 247 #define CMU_CLKOUT0_PC5 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x5) 248 #define CMU_CLKOUT0_PC6 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x6) 249 #define CMU_CLKOUT0_PC7 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x7) 250 #define CMU_CLKOUT0_PC8 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x8) 251 #define CMU_CLKOUT0_PC9 SILABS_DBUS_CMU_CLKOUT0(0x2, 0x9) 252 #define CMU_CLKOUT0_PD0 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x0) 253 #define CMU_CLKOUT0_PD1 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x1) 254 #define CMU_CLKOUT0_PD2 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x2) 255 #define CMU_CLKOUT0_PD3 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x3) 256 #define CMU_CLKOUT0_PD4 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x4) 257 #define CMU_CLKOUT0_PD5 SILABS_DBUS_CMU_CLKOUT0(0x3, 0x5) 258 #define CMU_CLKOUT1_PC0 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x0) 259 #define CMU_CLKOUT1_PC1 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x1) 260 #define CMU_CLKOUT1_PC2 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x2) 261 #define CMU_CLKOUT1_PC3 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x3) 262 #define CMU_CLKOUT1_PC4 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x4) 263 #define CMU_CLKOUT1_PC5 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x5) 264 #define CMU_CLKOUT1_PC6 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x6) 265 #define CMU_CLKOUT1_PC7 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x7) 266 #define CMU_CLKOUT1_PC8 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x8) 267 #define CMU_CLKOUT1_PC9 SILABS_DBUS_CMU_CLKOUT1(0x2, 0x9) 268 #define CMU_CLKOUT1_PD0 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x0) 269 #define CMU_CLKOUT1_PD1 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x1) 270 #define CMU_CLKOUT1_PD2 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x2) 271 #define CMU_CLKOUT1_PD3 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x3) 272 #define CMU_CLKOUT1_PD4 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x4) 273 #define CMU_CLKOUT1_PD5 SILABS_DBUS_CMU_CLKOUT1(0x3, 0x5) 274 #define CMU_CLKOUT2_PA0 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x0) 275 #define CMU_CLKOUT2_PA1 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x1) 276 #define CMU_CLKOUT2_PA2 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x2) 277 #define CMU_CLKOUT2_PA3 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x3) 278 #define CMU_CLKOUT2_PA4 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x4) 279 #define CMU_CLKOUT2_PA5 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x5) 280 #define CMU_CLKOUT2_PA6 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x6) 281 #define CMU_CLKOUT2_PA7 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x7) 282 #define CMU_CLKOUT2_PA8 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x8) 283 #define CMU_CLKOUT2_PA9 SILABS_DBUS_CMU_CLKOUT2(0x0, 0x9) 284 #define CMU_CLKOUT2_PA10 SILABS_DBUS_CMU_CLKOUT2(0x0, 0xa) 285 #define CMU_CLKOUT2_PB0 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x0) 286 #define CMU_CLKOUT2_PB1 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x1) 287 #define CMU_CLKOUT2_PB2 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x2) 288 #define CMU_CLKOUT2_PB3 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x3) 289 #define CMU_CLKOUT2_PB4 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x4) 290 #define CMU_CLKOUT2_PB5 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x5) 291 #define CMU_CLKOUT2_PB6 SILABS_DBUS_CMU_CLKOUT2(0x1, 0x6) 292 #define CMU_CLKIN0_PC0 SILABS_DBUS_CMU_CLKIN0(0x2, 0x0) 293 #define CMU_CLKIN0_PC1 SILABS_DBUS_CMU_CLKIN0(0x2, 0x1) 294 #define CMU_CLKIN0_PC2 SILABS_DBUS_CMU_CLKIN0(0x2, 0x2) 295 #define CMU_CLKIN0_PC3 SILABS_DBUS_CMU_CLKIN0(0x2, 0x3) 296 #define CMU_CLKIN0_PC4 SILABS_DBUS_CMU_CLKIN0(0x2, 0x4) 297 #define CMU_CLKIN0_PC5 SILABS_DBUS_CMU_CLKIN0(0x2, 0x5) 298 #define CMU_CLKIN0_PC6 SILABS_DBUS_CMU_CLKIN0(0x2, 0x6) 299 #define CMU_CLKIN0_PC7 SILABS_DBUS_CMU_CLKIN0(0x2, 0x7) 300 #define CMU_CLKIN0_PC8 SILABS_DBUS_CMU_CLKIN0(0x2, 0x8) 301 #define CMU_CLKIN0_PC9 SILABS_DBUS_CMU_CLKIN0(0x2, 0x9) 302 #define CMU_CLKIN0_PD0 SILABS_DBUS_CMU_CLKIN0(0x3, 0x0) 303 #define CMU_CLKIN0_PD1 SILABS_DBUS_CMU_CLKIN0(0x3, 0x1) 304 #define CMU_CLKIN0_PD2 SILABS_DBUS_CMU_CLKIN0(0x3, 0x2) 305 #define CMU_CLKIN0_PD3 SILABS_DBUS_CMU_CLKIN0(0x3, 0x3) 306 #define CMU_CLKIN0_PD4 SILABS_DBUS_CMU_CLKIN0(0x3, 0x4) 307 #define CMU_CLKIN0_PD5 SILABS_DBUS_CMU_CLKIN0(0x3, 0x5) 308 309 #define EUSART0_CS_PA0 SILABS_DBUS_EUSART0_CS(0x0, 0x0) 310 #define EUSART0_CS_PA1 SILABS_DBUS_EUSART0_CS(0x0, 0x1) 311 #define EUSART0_CS_PA2 SILABS_DBUS_EUSART0_CS(0x0, 0x2) 312 #define EUSART0_CS_PA3 SILABS_DBUS_EUSART0_CS(0x0, 0x3) 313 #define EUSART0_CS_PA4 SILABS_DBUS_EUSART0_CS(0x0, 0x4) 314 #define EUSART0_CS_PA5 SILABS_DBUS_EUSART0_CS(0x0, 0x5) 315 #define EUSART0_CS_PA6 SILABS_DBUS_EUSART0_CS(0x0, 0x6) 316 #define EUSART0_CS_PA7 SILABS_DBUS_EUSART0_CS(0x0, 0x7) 317 #define EUSART0_CS_PA8 SILABS_DBUS_EUSART0_CS(0x0, 0x8) 318 #define EUSART0_CS_PA9 SILABS_DBUS_EUSART0_CS(0x0, 0x9) 319 #define EUSART0_CS_PA10 SILABS_DBUS_EUSART0_CS(0x0, 0xa) 320 #define EUSART0_CS_PB0 SILABS_DBUS_EUSART0_CS(0x1, 0x0) 321 #define EUSART0_CS_PB1 SILABS_DBUS_EUSART0_CS(0x1, 0x1) 322 #define EUSART0_CS_PB2 SILABS_DBUS_EUSART0_CS(0x1, 0x2) 323 #define EUSART0_CS_PB3 SILABS_DBUS_EUSART0_CS(0x1, 0x3) 324 #define EUSART0_CS_PB4 SILABS_DBUS_EUSART0_CS(0x1, 0x4) 325 #define EUSART0_CS_PB5 SILABS_DBUS_EUSART0_CS(0x1, 0x5) 326 #define EUSART0_CS_PB6 SILABS_DBUS_EUSART0_CS(0x1, 0x6) 327 #define EUSART0_RTS_PA0 SILABS_DBUS_EUSART0_RTS(0x0, 0x0) 328 #define EUSART0_RTS_PA1 SILABS_DBUS_EUSART0_RTS(0x0, 0x1) 329 #define EUSART0_RTS_PA2 SILABS_DBUS_EUSART0_RTS(0x0, 0x2) 330 #define EUSART0_RTS_PA3 SILABS_DBUS_EUSART0_RTS(0x0, 0x3) 331 #define EUSART0_RTS_PA4 SILABS_DBUS_EUSART0_RTS(0x0, 0x4) 332 #define EUSART0_RTS_PA5 SILABS_DBUS_EUSART0_RTS(0x0, 0x5) 333 #define EUSART0_RTS_PA6 SILABS_DBUS_EUSART0_RTS(0x0, 0x6) 334 #define EUSART0_RTS_PA7 SILABS_DBUS_EUSART0_RTS(0x0, 0x7) 335 #define EUSART0_RTS_PA8 SILABS_DBUS_EUSART0_RTS(0x0, 0x8) 336 #define EUSART0_RTS_PA9 SILABS_DBUS_EUSART0_RTS(0x0, 0x9) 337 #define EUSART0_RTS_PA10 SILABS_DBUS_EUSART0_RTS(0x0, 0xa) 338 #define EUSART0_RTS_PB0 SILABS_DBUS_EUSART0_RTS(0x1, 0x0) 339 #define EUSART0_RTS_PB1 SILABS_DBUS_EUSART0_RTS(0x1, 0x1) 340 #define EUSART0_RTS_PB2 SILABS_DBUS_EUSART0_RTS(0x1, 0x2) 341 #define EUSART0_RTS_PB3 SILABS_DBUS_EUSART0_RTS(0x1, 0x3) 342 #define EUSART0_RTS_PB4 SILABS_DBUS_EUSART0_RTS(0x1, 0x4) 343 #define EUSART0_RTS_PB5 SILABS_DBUS_EUSART0_RTS(0x1, 0x5) 344 #define EUSART0_RTS_PB6 SILABS_DBUS_EUSART0_RTS(0x1, 0x6) 345 #define EUSART0_RX_PA0 SILABS_DBUS_EUSART0_RX(0x0, 0x0) 346 #define EUSART0_RX_PA1 SILABS_DBUS_EUSART0_RX(0x0, 0x1) 347 #define EUSART0_RX_PA2 SILABS_DBUS_EUSART0_RX(0x0, 0x2) 348 #define EUSART0_RX_PA3 SILABS_DBUS_EUSART0_RX(0x0, 0x3) 349 #define EUSART0_RX_PA4 SILABS_DBUS_EUSART0_RX(0x0, 0x4) 350 #define EUSART0_RX_PA5 SILABS_DBUS_EUSART0_RX(0x0, 0x5) 351 #define EUSART0_RX_PA6 SILABS_DBUS_EUSART0_RX(0x0, 0x6) 352 #define EUSART0_RX_PA7 SILABS_DBUS_EUSART0_RX(0x0, 0x7) 353 #define EUSART0_RX_PA8 SILABS_DBUS_EUSART0_RX(0x0, 0x8) 354 #define EUSART0_RX_PA9 SILABS_DBUS_EUSART0_RX(0x0, 0x9) 355 #define EUSART0_RX_PA10 SILABS_DBUS_EUSART0_RX(0x0, 0xa) 356 #define EUSART0_RX_PB0 SILABS_DBUS_EUSART0_RX(0x1, 0x0) 357 #define EUSART0_RX_PB1 SILABS_DBUS_EUSART0_RX(0x1, 0x1) 358 #define EUSART0_RX_PB2 SILABS_DBUS_EUSART0_RX(0x1, 0x2) 359 #define EUSART0_RX_PB3 SILABS_DBUS_EUSART0_RX(0x1, 0x3) 360 #define EUSART0_RX_PB4 SILABS_DBUS_EUSART0_RX(0x1, 0x4) 361 #define EUSART0_RX_PB5 SILABS_DBUS_EUSART0_RX(0x1, 0x5) 362 #define EUSART0_RX_PB6 SILABS_DBUS_EUSART0_RX(0x1, 0x6) 363 #define EUSART0_SCLK_PA0 SILABS_DBUS_EUSART0_SCLK(0x0, 0x0) 364 #define EUSART0_SCLK_PA1 SILABS_DBUS_EUSART0_SCLK(0x0, 0x1) 365 #define EUSART0_SCLK_PA2 SILABS_DBUS_EUSART0_SCLK(0x0, 0x2) 366 #define EUSART0_SCLK_PA3 SILABS_DBUS_EUSART0_SCLK(0x0, 0x3) 367 #define EUSART0_SCLK_PA4 SILABS_DBUS_EUSART0_SCLK(0x0, 0x4) 368 #define EUSART0_SCLK_PA5 SILABS_DBUS_EUSART0_SCLK(0x0, 0x5) 369 #define EUSART0_SCLK_PA6 SILABS_DBUS_EUSART0_SCLK(0x0, 0x6) 370 #define EUSART0_SCLK_PA7 SILABS_DBUS_EUSART0_SCLK(0x0, 0x7) 371 #define EUSART0_SCLK_PA8 SILABS_DBUS_EUSART0_SCLK(0x0, 0x8) 372 #define EUSART0_SCLK_PA9 SILABS_DBUS_EUSART0_SCLK(0x0, 0x9) 373 #define EUSART0_SCLK_PA10 SILABS_DBUS_EUSART0_SCLK(0x0, 0xa) 374 #define EUSART0_SCLK_PB0 SILABS_DBUS_EUSART0_SCLK(0x1, 0x0) 375 #define EUSART0_SCLK_PB1 SILABS_DBUS_EUSART0_SCLK(0x1, 0x1) 376 #define EUSART0_SCLK_PB2 SILABS_DBUS_EUSART0_SCLK(0x1, 0x2) 377 #define EUSART0_SCLK_PB3 SILABS_DBUS_EUSART0_SCLK(0x1, 0x3) 378 #define EUSART0_SCLK_PB4 SILABS_DBUS_EUSART0_SCLK(0x1, 0x4) 379 #define EUSART0_SCLK_PB5 SILABS_DBUS_EUSART0_SCLK(0x1, 0x5) 380 #define EUSART0_SCLK_PB6 SILABS_DBUS_EUSART0_SCLK(0x1, 0x6) 381 #define EUSART0_TX_PA0 SILABS_DBUS_EUSART0_TX(0x0, 0x0) 382 #define EUSART0_TX_PA1 SILABS_DBUS_EUSART0_TX(0x0, 0x1) 383 #define EUSART0_TX_PA2 SILABS_DBUS_EUSART0_TX(0x0, 0x2) 384 #define EUSART0_TX_PA3 SILABS_DBUS_EUSART0_TX(0x0, 0x3) 385 #define EUSART0_TX_PA4 SILABS_DBUS_EUSART0_TX(0x0, 0x4) 386 #define EUSART0_TX_PA5 SILABS_DBUS_EUSART0_TX(0x0, 0x5) 387 #define EUSART0_TX_PA6 SILABS_DBUS_EUSART0_TX(0x0, 0x6) 388 #define EUSART0_TX_PA7 SILABS_DBUS_EUSART0_TX(0x0, 0x7) 389 #define EUSART0_TX_PA8 SILABS_DBUS_EUSART0_TX(0x0, 0x8) 390 #define EUSART0_TX_PA9 SILABS_DBUS_EUSART0_TX(0x0, 0x9) 391 #define EUSART0_TX_PA10 SILABS_DBUS_EUSART0_TX(0x0, 0xa) 392 #define EUSART0_TX_PB0 SILABS_DBUS_EUSART0_TX(0x1, 0x0) 393 #define EUSART0_TX_PB1 SILABS_DBUS_EUSART0_TX(0x1, 0x1) 394 #define EUSART0_TX_PB2 SILABS_DBUS_EUSART0_TX(0x1, 0x2) 395 #define EUSART0_TX_PB3 SILABS_DBUS_EUSART0_TX(0x1, 0x3) 396 #define EUSART0_TX_PB4 SILABS_DBUS_EUSART0_TX(0x1, 0x4) 397 #define EUSART0_TX_PB5 SILABS_DBUS_EUSART0_TX(0x1, 0x5) 398 #define EUSART0_TX_PB6 SILABS_DBUS_EUSART0_TX(0x1, 0x6) 399 #define EUSART0_CTS_PA0 SILABS_DBUS_EUSART0_CTS(0x0, 0x0) 400 #define EUSART0_CTS_PA1 SILABS_DBUS_EUSART0_CTS(0x0, 0x1) 401 #define EUSART0_CTS_PA2 SILABS_DBUS_EUSART0_CTS(0x0, 0x2) 402 #define EUSART0_CTS_PA3 SILABS_DBUS_EUSART0_CTS(0x0, 0x3) 403 #define EUSART0_CTS_PA4 SILABS_DBUS_EUSART0_CTS(0x0, 0x4) 404 #define EUSART0_CTS_PA5 SILABS_DBUS_EUSART0_CTS(0x0, 0x5) 405 #define EUSART0_CTS_PA6 SILABS_DBUS_EUSART0_CTS(0x0, 0x6) 406 #define EUSART0_CTS_PA7 SILABS_DBUS_EUSART0_CTS(0x0, 0x7) 407 #define EUSART0_CTS_PA8 SILABS_DBUS_EUSART0_CTS(0x0, 0x8) 408 #define EUSART0_CTS_PA9 SILABS_DBUS_EUSART0_CTS(0x0, 0x9) 409 #define EUSART0_CTS_PA10 SILABS_DBUS_EUSART0_CTS(0x0, 0xa) 410 #define EUSART0_CTS_PB0 SILABS_DBUS_EUSART0_CTS(0x1, 0x0) 411 #define EUSART0_CTS_PB1 SILABS_DBUS_EUSART0_CTS(0x1, 0x1) 412 #define EUSART0_CTS_PB2 SILABS_DBUS_EUSART0_CTS(0x1, 0x2) 413 #define EUSART0_CTS_PB3 SILABS_DBUS_EUSART0_CTS(0x1, 0x3) 414 #define EUSART0_CTS_PB4 SILABS_DBUS_EUSART0_CTS(0x1, 0x4) 415 #define EUSART0_CTS_PB5 SILABS_DBUS_EUSART0_CTS(0x1, 0x5) 416 #define EUSART0_CTS_PB6 SILABS_DBUS_EUSART0_CTS(0x1, 0x6) 417 418 #define EUSART1_CS_PA0 SILABS_DBUS_EUSART1_CS(0x0, 0x0) 419 #define EUSART1_CS_PA1 SILABS_DBUS_EUSART1_CS(0x0, 0x1) 420 #define EUSART1_CS_PA2 SILABS_DBUS_EUSART1_CS(0x0, 0x2) 421 #define EUSART1_CS_PA3 SILABS_DBUS_EUSART1_CS(0x0, 0x3) 422 #define EUSART1_CS_PA4 SILABS_DBUS_EUSART1_CS(0x0, 0x4) 423 #define EUSART1_CS_PA5 SILABS_DBUS_EUSART1_CS(0x0, 0x5) 424 #define EUSART1_CS_PA6 SILABS_DBUS_EUSART1_CS(0x0, 0x6) 425 #define EUSART1_CS_PA7 SILABS_DBUS_EUSART1_CS(0x0, 0x7) 426 #define EUSART1_CS_PA8 SILABS_DBUS_EUSART1_CS(0x0, 0x8) 427 #define EUSART1_CS_PA9 SILABS_DBUS_EUSART1_CS(0x0, 0x9) 428 #define EUSART1_CS_PA10 SILABS_DBUS_EUSART1_CS(0x0, 0xa) 429 #define EUSART1_CS_PB0 SILABS_DBUS_EUSART1_CS(0x1, 0x0) 430 #define EUSART1_CS_PB1 SILABS_DBUS_EUSART1_CS(0x1, 0x1) 431 #define EUSART1_CS_PB2 SILABS_DBUS_EUSART1_CS(0x1, 0x2) 432 #define EUSART1_CS_PB3 SILABS_DBUS_EUSART1_CS(0x1, 0x3) 433 #define EUSART1_CS_PB4 SILABS_DBUS_EUSART1_CS(0x1, 0x4) 434 #define EUSART1_CS_PB5 SILABS_DBUS_EUSART1_CS(0x1, 0x5) 435 #define EUSART1_CS_PB6 SILABS_DBUS_EUSART1_CS(0x1, 0x6) 436 #define EUSART1_CS_PC0 SILABS_DBUS_EUSART1_CS(0x2, 0x0) 437 #define EUSART1_CS_PC1 SILABS_DBUS_EUSART1_CS(0x2, 0x1) 438 #define EUSART1_CS_PC2 SILABS_DBUS_EUSART1_CS(0x2, 0x2) 439 #define EUSART1_CS_PC3 SILABS_DBUS_EUSART1_CS(0x2, 0x3) 440 #define EUSART1_CS_PC4 SILABS_DBUS_EUSART1_CS(0x2, 0x4) 441 #define EUSART1_CS_PC5 SILABS_DBUS_EUSART1_CS(0x2, 0x5) 442 #define EUSART1_CS_PC6 SILABS_DBUS_EUSART1_CS(0x2, 0x6) 443 #define EUSART1_CS_PC7 SILABS_DBUS_EUSART1_CS(0x2, 0x7) 444 #define EUSART1_CS_PC8 SILABS_DBUS_EUSART1_CS(0x2, 0x8) 445 #define EUSART1_CS_PC9 SILABS_DBUS_EUSART1_CS(0x2, 0x9) 446 #define EUSART1_CS_PD0 SILABS_DBUS_EUSART1_CS(0x3, 0x0) 447 #define EUSART1_CS_PD1 SILABS_DBUS_EUSART1_CS(0x3, 0x1) 448 #define EUSART1_CS_PD2 SILABS_DBUS_EUSART1_CS(0x3, 0x2) 449 #define EUSART1_CS_PD3 SILABS_DBUS_EUSART1_CS(0x3, 0x3) 450 #define EUSART1_CS_PD4 SILABS_DBUS_EUSART1_CS(0x3, 0x4) 451 #define EUSART1_CS_PD5 SILABS_DBUS_EUSART1_CS(0x3, 0x5) 452 #define EUSART1_RTS_PA0 SILABS_DBUS_EUSART1_RTS(0x0, 0x0) 453 #define EUSART1_RTS_PA1 SILABS_DBUS_EUSART1_RTS(0x0, 0x1) 454 #define EUSART1_RTS_PA2 SILABS_DBUS_EUSART1_RTS(0x0, 0x2) 455 #define EUSART1_RTS_PA3 SILABS_DBUS_EUSART1_RTS(0x0, 0x3) 456 #define EUSART1_RTS_PA4 SILABS_DBUS_EUSART1_RTS(0x0, 0x4) 457 #define EUSART1_RTS_PA5 SILABS_DBUS_EUSART1_RTS(0x0, 0x5) 458 #define EUSART1_RTS_PA6 SILABS_DBUS_EUSART1_RTS(0x0, 0x6) 459 #define EUSART1_RTS_PA7 SILABS_DBUS_EUSART1_RTS(0x0, 0x7) 460 #define EUSART1_RTS_PA8 SILABS_DBUS_EUSART1_RTS(0x0, 0x8) 461 #define EUSART1_RTS_PA9 SILABS_DBUS_EUSART1_RTS(0x0, 0x9) 462 #define EUSART1_RTS_PA10 SILABS_DBUS_EUSART1_RTS(0x0, 0xa) 463 #define EUSART1_RTS_PB0 SILABS_DBUS_EUSART1_RTS(0x1, 0x0) 464 #define EUSART1_RTS_PB1 SILABS_DBUS_EUSART1_RTS(0x1, 0x1) 465 #define EUSART1_RTS_PB2 SILABS_DBUS_EUSART1_RTS(0x1, 0x2) 466 #define EUSART1_RTS_PB3 SILABS_DBUS_EUSART1_RTS(0x1, 0x3) 467 #define EUSART1_RTS_PB4 SILABS_DBUS_EUSART1_RTS(0x1, 0x4) 468 #define EUSART1_RTS_PB5 SILABS_DBUS_EUSART1_RTS(0x1, 0x5) 469 #define EUSART1_RTS_PB6 SILABS_DBUS_EUSART1_RTS(0x1, 0x6) 470 #define EUSART1_RTS_PC0 SILABS_DBUS_EUSART1_RTS(0x2, 0x0) 471 #define EUSART1_RTS_PC1 SILABS_DBUS_EUSART1_RTS(0x2, 0x1) 472 #define EUSART1_RTS_PC2 SILABS_DBUS_EUSART1_RTS(0x2, 0x2) 473 #define EUSART1_RTS_PC3 SILABS_DBUS_EUSART1_RTS(0x2, 0x3) 474 #define EUSART1_RTS_PC4 SILABS_DBUS_EUSART1_RTS(0x2, 0x4) 475 #define EUSART1_RTS_PC5 SILABS_DBUS_EUSART1_RTS(0x2, 0x5) 476 #define EUSART1_RTS_PC6 SILABS_DBUS_EUSART1_RTS(0x2, 0x6) 477 #define EUSART1_RTS_PC7 SILABS_DBUS_EUSART1_RTS(0x2, 0x7) 478 #define EUSART1_RTS_PC8 SILABS_DBUS_EUSART1_RTS(0x2, 0x8) 479 #define EUSART1_RTS_PC9 SILABS_DBUS_EUSART1_RTS(0x2, 0x9) 480 #define EUSART1_RTS_PD0 SILABS_DBUS_EUSART1_RTS(0x3, 0x0) 481 #define EUSART1_RTS_PD1 SILABS_DBUS_EUSART1_RTS(0x3, 0x1) 482 #define EUSART1_RTS_PD2 SILABS_DBUS_EUSART1_RTS(0x3, 0x2) 483 #define EUSART1_RTS_PD3 SILABS_DBUS_EUSART1_RTS(0x3, 0x3) 484 #define EUSART1_RTS_PD4 SILABS_DBUS_EUSART1_RTS(0x3, 0x4) 485 #define EUSART1_RTS_PD5 SILABS_DBUS_EUSART1_RTS(0x3, 0x5) 486 #define EUSART1_RX_PA0 SILABS_DBUS_EUSART1_RX(0x0, 0x0) 487 #define EUSART1_RX_PA1 SILABS_DBUS_EUSART1_RX(0x0, 0x1) 488 #define EUSART1_RX_PA2 SILABS_DBUS_EUSART1_RX(0x0, 0x2) 489 #define EUSART1_RX_PA3 SILABS_DBUS_EUSART1_RX(0x0, 0x3) 490 #define EUSART1_RX_PA4 SILABS_DBUS_EUSART1_RX(0x0, 0x4) 491 #define EUSART1_RX_PA5 SILABS_DBUS_EUSART1_RX(0x0, 0x5) 492 #define EUSART1_RX_PA6 SILABS_DBUS_EUSART1_RX(0x0, 0x6) 493 #define EUSART1_RX_PA7 SILABS_DBUS_EUSART1_RX(0x0, 0x7) 494 #define EUSART1_RX_PA8 SILABS_DBUS_EUSART1_RX(0x0, 0x8) 495 #define EUSART1_RX_PA9 SILABS_DBUS_EUSART1_RX(0x0, 0x9) 496 #define EUSART1_RX_PA10 SILABS_DBUS_EUSART1_RX(0x0, 0xa) 497 #define EUSART1_RX_PB0 SILABS_DBUS_EUSART1_RX(0x1, 0x0) 498 #define EUSART1_RX_PB1 SILABS_DBUS_EUSART1_RX(0x1, 0x1) 499 #define EUSART1_RX_PB2 SILABS_DBUS_EUSART1_RX(0x1, 0x2) 500 #define EUSART1_RX_PB3 SILABS_DBUS_EUSART1_RX(0x1, 0x3) 501 #define EUSART1_RX_PB4 SILABS_DBUS_EUSART1_RX(0x1, 0x4) 502 #define EUSART1_RX_PB5 SILABS_DBUS_EUSART1_RX(0x1, 0x5) 503 #define EUSART1_RX_PB6 SILABS_DBUS_EUSART1_RX(0x1, 0x6) 504 #define EUSART1_RX_PC0 SILABS_DBUS_EUSART1_RX(0x2, 0x0) 505 #define EUSART1_RX_PC1 SILABS_DBUS_EUSART1_RX(0x2, 0x1) 506 #define EUSART1_RX_PC2 SILABS_DBUS_EUSART1_RX(0x2, 0x2) 507 #define EUSART1_RX_PC3 SILABS_DBUS_EUSART1_RX(0x2, 0x3) 508 #define EUSART1_RX_PC4 SILABS_DBUS_EUSART1_RX(0x2, 0x4) 509 #define EUSART1_RX_PC5 SILABS_DBUS_EUSART1_RX(0x2, 0x5) 510 #define EUSART1_RX_PC6 SILABS_DBUS_EUSART1_RX(0x2, 0x6) 511 #define EUSART1_RX_PC7 SILABS_DBUS_EUSART1_RX(0x2, 0x7) 512 #define EUSART1_RX_PC8 SILABS_DBUS_EUSART1_RX(0x2, 0x8) 513 #define EUSART1_RX_PC9 SILABS_DBUS_EUSART1_RX(0x2, 0x9) 514 #define EUSART1_RX_PD0 SILABS_DBUS_EUSART1_RX(0x3, 0x0) 515 #define EUSART1_RX_PD1 SILABS_DBUS_EUSART1_RX(0x3, 0x1) 516 #define EUSART1_RX_PD2 SILABS_DBUS_EUSART1_RX(0x3, 0x2) 517 #define EUSART1_RX_PD3 SILABS_DBUS_EUSART1_RX(0x3, 0x3) 518 #define EUSART1_RX_PD4 SILABS_DBUS_EUSART1_RX(0x3, 0x4) 519 #define EUSART1_RX_PD5 SILABS_DBUS_EUSART1_RX(0x3, 0x5) 520 #define EUSART1_SCLK_PA0 SILABS_DBUS_EUSART1_SCLK(0x0, 0x0) 521 #define EUSART1_SCLK_PA1 SILABS_DBUS_EUSART1_SCLK(0x0, 0x1) 522 #define EUSART1_SCLK_PA2 SILABS_DBUS_EUSART1_SCLK(0x0, 0x2) 523 #define EUSART1_SCLK_PA3 SILABS_DBUS_EUSART1_SCLK(0x0, 0x3) 524 #define EUSART1_SCLK_PA4 SILABS_DBUS_EUSART1_SCLK(0x0, 0x4) 525 #define EUSART1_SCLK_PA5 SILABS_DBUS_EUSART1_SCLK(0x0, 0x5) 526 #define EUSART1_SCLK_PA6 SILABS_DBUS_EUSART1_SCLK(0x0, 0x6) 527 #define EUSART1_SCLK_PA7 SILABS_DBUS_EUSART1_SCLK(0x0, 0x7) 528 #define EUSART1_SCLK_PA8 SILABS_DBUS_EUSART1_SCLK(0x0, 0x8) 529 #define EUSART1_SCLK_PA9 SILABS_DBUS_EUSART1_SCLK(0x0, 0x9) 530 #define EUSART1_SCLK_PA10 SILABS_DBUS_EUSART1_SCLK(0x0, 0xa) 531 #define EUSART1_SCLK_PB0 SILABS_DBUS_EUSART1_SCLK(0x1, 0x0) 532 #define EUSART1_SCLK_PB1 SILABS_DBUS_EUSART1_SCLK(0x1, 0x1) 533 #define EUSART1_SCLK_PB2 SILABS_DBUS_EUSART1_SCLK(0x1, 0x2) 534 #define EUSART1_SCLK_PB3 SILABS_DBUS_EUSART1_SCLK(0x1, 0x3) 535 #define EUSART1_SCLK_PB4 SILABS_DBUS_EUSART1_SCLK(0x1, 0x4) 536 #define EUSART1_SCLK_PB5 SILABS_DBUS_EUSART1_SCLK(0x1, 0x5) 537 #define EUSART1_SCLK_PB6 SILABS_DBUS_EUSART1_SCLK(0x1, 0x6) 538 #define EUSART1_SCLK_PC0 SILABS_DBUS_EUSART1_SCLK(0x2, 0x0) 539 #define EUSART1_SCLK_PC1 SILABS_DBUS_EUSART1_SCLK(0x2, 0x1) 540 #define EUSART1_SCLK_PC2 SILABS_DBUS_EUSART1_SCLK(0x2, 0x2) 541 #define EUSART1_SCLK_PC3 SILABS_DBUS_EUSART1_SCLK(0x2, 0x3) 542 #define EUSART1_SCLK_PC4 SILABS_DBUS_EUSART1_SCLK(0x2, 0x4) 543 #define EUSART1_SCLK_PC5 SILABS_DBUS_EUSART1_SCLK(0x2, 0x5) 544 #define EUSART1_SCLK_PC6 SILABS_DBUS_EUSART1_SCLK(0x2, 0x6) 545 #define EUSART1_SCLK_PC7 SILABS_DBUS_EUSART1_SCLK(0x2, 0x7) 546 #define EUSART1_SCLK_PC8 SILABS_DBUS_EUSART1_SCLK(0x2, 0x8) 547 #define EUSART1_SCLK_PC9 SILABS_DBUS_EUSART1_SCLK(0x2, 0x9) 548 #define EUSART1_SCLK_PD0 SILABS_DBUS_EUSART1_SCLK(0x3, 0x0) 549 #define EUSART1_SCLK_PD1 SILABS_DBUS_EUSART1_SCLK(0x3, 0x1) 550 #define EUSART1_SCLK_PD2 SILABS_DBUS_EUSART1_SCLK(0x3, 0x2) 551 #define EUSART1_SCLK_PD3 SILABS_DBUS_EUSART1_SCLK(0x3, 0x3) 552 #define EUSART1_SCLK_PD4 SILABS_DBUS_EUSART1_SCLK(0x3, 0x4) 553 #define EUSART1_SCLK_PD5 SILABS_DBUS_EUSART1_SCLK(0x3, 0x5) 554 #define EUSART1_TX_PA0 SILABS_DBUS_EUSART1_TX(0x0, 0x0) 555 #define EUSART1_TX_PA1 SILABS_DBUS_EUSART1_TX(0x0, 0x1) 556 #define EUSART1_TX_PA2 SILABS_DBUS_EUSART1_TX(0x0, 0x2) 557 #define EUSART1_TX_PA3 SILABS_DBUS_EUSART1_TX(0x0, 0x3) 558 #define EUSART1_TX_PA4 SILABS_DBUS_EUSART1_TX(0x0, 0x4) 559 #define EUSART1_TX_PA5 SILABS_DBUS_EUSART1_TX(0x0, 0x5) 560 #define EUSART1_TX_PA6 SILABS_DBUS_EUSART1_TX(0x0, 0x6) 561 #define EUSART1_TX_PA7 SILABS_DBUS_EUSART1_TX(0x0, 0x7) 562 #define EUSART1_TX_PA8 SILABS_DBUS_EUSART1_TX(0x0, 0x8) 563 #define EUSART1_TX_PA9 SILABS_DBUS_EUSART1_TX(0x0, 0x9) 564 #define EUSART1_TX_PA10 SILABS_DBUS_EUSART1_TX(0x0, 0xa) 565 #define EUSART1_TX_PB0 SILABS_DBUS_EUSART1_TX(0x1, 0x0) 566 #define EUSART1_TX_PB1 SILABS_DBUS_EUSART1_TX(0x1, 0x1) 567 #define EUSART1_TX_PB2 SILABS_DBUS_EUSART1_TX(0x1, 0x2) 568 #define EUSART1_TX_PB3 SILABS_DBUS_EUSART1_TX(0x1, 0x3) 569 #define EUSART1_TX_PB4 SILABS_DBUS_EUSART1_TX(0x1, 0x4) 570 #define EUSART1_TX_PB5 SILABS_DBUS_EUSART1_TX(0x1, 0x5) 571 #define EUSART1_TX_PB6 SILABS_DBUS_EUSART1_TX(0x1, 0x6) 572 #define EUSART1_TX_PC0 SILABS_DBUS_EUSART1_TX(0x2, 0x0) 573 #define EUSART1_TX_PC1 SILABS_DBUS_EUSART1_TX(0x2, 0x1) 574 #define EUSART1_TX_PC2 SILABS_DBUS_EUSART1_TX(0x2, 0x2) 575 #define EUSART1_TX_PC3 SILABS_DBUS_EUSART1_TX(0x2, 0x3) 576 #define EUSART1_TX_PC4 SILABS_DBUS_EUSART1_TX(0x2, 0x4) 577 #define EUSART1_TX_PC5 SILABS_DBUS_EUSART1_TX(0x2, 0x5) 578 #define EUSART1_TX_PC6 SILABS_DBUS_EUSART1_TX(0x2, 0x6) 579 #define EUSART1_TX_PC7 SILABS_DBUS_EUSART1_TX(0x2, 0x7) 580 #define EUSART1_TX_PC8 SILABS_DBUS_EUSART1_TX(0x2, 0x8) 581 #define EUSART1_TX_PC9 SILABS_DBUS_EUSART1_TX(0x2, 0x9) 582 #define EUSART1_TX_PD0 SILABS_DBUS_EUSART1_TX(0x3, 0x0) 583 #define EUSART1_TX_PD1 SILABS_DBUS_EUSART1_TX(0x3, 0x1) 584 #define EUSART1_TX_PD2 SILABS_DBUS_EUSART1_TX(0x3, 0x2) 585 #define EUSART1_TX_PD3 SILABS_DBUS_EUSART1_TX(0x3, 0x3) 586 #define EUSART1_TX_PD4 SILABS_DBUS_EUSART1_TX(0x3, 0x4) 587 #define EUSART1_TX_PD5 SILABS_DBUS_EUSART1_TX(0x3, 0x5) 588 #define EUSART1_CTS_PA0 SILABS_DBUS_EUSART1_CTS(0x0, 0x0) 589 #define EUSART1_CTS_PA1 SILABS_DBUS_EUSART1_CTS(0x0, 0x1) 590 #define EUSART1_CTS_PA2 SILABS_DBUS_EUSART1_CTS(0x0, 0x2) 591 #define EUSART1_CTS_PA3 SILABS_DBUS_EUSART1_CTS(0x0, 0x3) 592 #define EUSART1_CTS_PA4 SILABS_DBUS_EUSART1_CTS(0x0, 0x4) 593 #define EUSART1_CTS_PA5 SILABS_DBUS_EUSART1_CTS(0x0, 0x5) 594 #define EUSART1_CTS_PA6 SILABS_DBUS_EUSART1_CTS(0x0, 0x6) 595 #define EUSART1_CTS_PA7 SILABS_DBUS_EUSART1_CTS(0x0, 0x7) 596 #define EUSART1_CTS_PA8 SILABS_DBUS_EUSART1_CTS(0x0, 0x8) 597 #define EUSART1_CTS_PA9 SILABS_DBUS_EUSART1_CTS(0x0, 0x9) 598 #define EUSART1_CTS_PA10 SILABS_DBUS_EUSART1_CTS(0x0, 0xa) 599 #define EUSART1_CTS_PB0 SILABS_DBUS_EUSART1_CTS(0x1, 0x0) 600 #define EUSART1_CTS_PB1 SILABS_DBUS_EUSART1_CTS(0x1, 0x1) 601 #define EUSART1_CTS_PB2 SILABS_DBUS_EUSART1_CTS(0x1, 0x2) 602 #define EUSART1_CTS_PB3 SILABS_DBUS_EUSART1_CTS(0x1, 0x3) 603 #define EUSART1_CTS_PB4 SILABS_DBUS_EUSART1_CTS(0x1, 0x4) 604 #define EUSART1_CTS_PB5 SILABS_DBUS_EUSART1_CTS(0x1, 0x5) 605 #define EUSART1_CTS_PB6 SILABS_DBUS_EUSART1_CTS(0x1, 0x6) 606 #define EUSART1_CTS_PC0 SILABS_DBUS_EUSART1_CTS(0x2, 0x0) 607 #define EUSART1_CTS_PC1 SILABS_DBUS_EUSART1_CTS(0x2, 0x1) 608 #define EUSART1_CTS_PC2 SILABS_DBUS_EUSART1_CTS(0x2, 0x2) 609 #define EUSART1_CTS_PC3 SILABS_DBUS_EUSART1_CTS(0x2, 0x3) 610 #define EUSART1_CTS_PC4 SILABS_DBUS_EUSART1_CTS(0x2, 0x4) 611 #define EUSART1_CTS_PC5 SILABS_DBUS_EUSART1_CTS(0x2, 0x5) 612 #define EUSART1_CTS_PC6 SILABS_DBUS_EUSART1_CTS(0x2, 0x6) 613 #define EUSART1_CTS_PC7 SILABS_DBUS_EUSART1_CTS(0x2, 0x7) 614 #define EUSART1_CTS_PC8 SILABS_DBUS_EUSART1_CTS(0x2, 0x8) 615 #define EUSART1_CTS_PC9 SILABS_DBUS_EUSART1_CTS(0x2, 0x9) 616 #define EUSART1_CTS_PD0 SILABS_DBUS_EUSART1_CTS(0x3, 0x0) 617 #define EUSART1_CTS_PD1 SILABS_DBUS_EUSART1_CTS(0x3, 0x1) 618 #define EUSART1_CTS_PD2 SILABS_DBUS_EUSART1_CTS(0x3, 0x2) 619 #define EUSART1_CTS_PD3 SILABS_DBUS_EUSART1_CTS(0x3, 0x3) 620 #define EUSART1_CTS_PD4 SILABS_DBUS_EUSART1_CTS(0x3, 0x4) 621 #define EUSART1_CTS_PD5 SILABS_DBUS_EUSART1_CTS(0x3, 0x5) 622 623 #define EUSART2_CS_PC0 SILABS_DBUS_EUSART2_CS(0x2, 0x0) 624 #define EUSART2_CS_PC1 SILABS_DBUS_EUSART2_CS(0x2, 0x1) 625 #define EUSART2_CS_PC2 SILABS_DBUS_EUSART2_CS(0x2, 0x2) 626 #define EUSART2_CS_PC3 SILABS_DBUS_EUSART2_CS(0x2, 0x3) 627 #define EUSART2_CS_PC4 SILABS_DBUS_EUSART2_CS(0x2, 0x4) 628 #define EUSART2_CS_PC5 SILABS_DBUS_EUSART2_CS(0x2, 0x5) 629 #define EUSART2_CS_PC6 SILABS_DBUS_EUSART2_CS(0x2, 0x6) 630 #define EUSART2_CS_PC7 SILABS_DBUS_EUSART2_CS(0x2, 0x7) 631 #define EUSART2_CS_PC8 SILABS_DBUS_EUSART2_CS(0x2, 0x8) 632 #define EUSART2_CS_PC9 SILABS_DBUS_EUSART2_CS(0x2, 0x9) 633 #define EUSART2_CS_PD0 SILABS_DBUS_EUSART2_CS(0x3, 0x0) 634 #define EUSART2_CS_PD1 SILABS_DBUS_EUSART2_CS(0x3, 0x1) 635 #define EUSART2_CS_PD2 SILABS_DBUS_EUSART2_CS(0x3, 0x2) 636 #define EUSART2_CS_PD3 SILABS_DBUS_EUSART2_CS(0x3, 0x3) 637 #define EUSART2_CS_PD4 SILABS_DBUS_EUSART2_CS(0x3, 0x4) 638 #define EUSART2_CS_PD5 SILABS_DBUS_EUSART2_CS(0x3, 0x5) 639 #define EUSART2_RTS_PC0 SILABS_DBUS_EUSART2_RTS(0x2, 0x0) 640 #define EUSART2_RTS_PC1 SILABS_DBUS_EUSART2_RTS(0x2, 0x1) 641 #define EUSART2_RTS_PC2 SILABS_DBUS_EUSART2_RTS(0x2, 0x2) 642 #define EUSART2_RTS_PC3 SILABS_DBUS_EUSART2_RTS(0x2, 0x3) 643 #define EUSART2_RTS_PC4 SILABS_DBUS_EUSART2_RTS(0x2, 0x4) 644 #define EUSART2_RTS_PC5 SILABS_DBUS_EUSART2_RTS(0x2, 0x5) 645 #define EUSART2_RTS_PC6 SILABS_DBUS_EUSART2_RTS(0x2, 0x6) 646 #define EUSART2_RTS_PC7 SILABS_DBUS_EUSART2_RTS(0x2, 0x7) 647 #define EUSART2_RTS_PC8 SILABS_DBUS_EUSART2_RTS(0x2, 0x8) 648 #define EUSART2_RTS_PC9 SILABS_DBUS_EUSART2_RTS(0x2, 0x9) 649 #define EUSART2_RTS_PD0 SILABS_DBUS_EUSART2_RTS(0x3, 0x0) 650 #define EUSART2_RTS_PD1 SILABS_DBUS_EUSART2_RTS(0x3, 0x1) 651 #define EUSART2_RTS_PD2 SILABS_DBUS_EUSART2_RTS(0x3, 0x2) 652 #define EUSART2_RTS_PD3 SILABS_DBUS_EUSART2_RTS(0x3, 0x3) 653 #define EUSART2_RTS_PD4 SILABS_DBUS_EUSART2_RTS(0x3, 0x4) 654 #define EUSART2_RTS_PD5 SILABS_DBUS_EUSART2_RTS(0x3, 0x5) 655 #define EUSART2_RX_PC0 SILABS_DBUS_EUSART2_RX(0x2, 0x0) 656 #define EUSART2_RX_PC1 SILABS_DBUS_EUSART2_RX(0x2, 0x1) 657 #define EUSART2_RX_PC2 SILABS_DBUS_EUSART2_RX(0x2, 0x2) 658 #define EUSART2_RX_PC3 SILABS_DBUS_EUSART2_RX(0x2, 0x3) 659 #define EUSART2_RX_PC4 SILABS_DBUS_EUSART2_RX(0x2, 0x4) 660 #define EUSART2_RX_PC5 SILABS_DBUS_EUSART2_RX(0x2, 0x5) 661 #define EUSART2_RX_PC6 SILABS_DBUS_EUSART2_RX(0x2, 0x6) 662 #define EUSART2_RX_PC7 SILABS_DBUS_EUSART2_RX(0x2, 0x7) 663 #define EUSART2_RX_PC8 SILABS_DBUS_EUSART2_RX(0x2, 0x8) 664 #define EUSART2_RX_PC9 SILABS_DBUS_EUSART2_RX(0x2, 0x9) 665 #define EUSART2_RX_PD0 SILABS_DBUS_EUSART2_RX(0x3, 0x0) 666 #define EUSART2_RX_PD1 SILABS_DBUS_EUSART2_RX(0x3, 0x1) 667 #define EUSART2_RX_PD2 SILABS_DBUS_EUSART2_RX(0x3, 0x2) 668 #define EUSART2_RX_PD3 SILABS_DBUS_EUSART2_RX(0x3, 0x3) 669 #define EUSART2_RX_PD4 SILABS_DBUS_EUSART2_RX(0x3, 0x4) 670 #define EUSART2_RX_PD5 SILABS_DBUS_EUSART2_RX(0x3, 0x5) 671 #define EUSART2_SCLK_PC0 SILABS_DBUS_EUSART2_SCLK(0x2, 0x0) 672 #define EUSART2_SCLK_PC1 SILABS_DBUS_EUSART2_SCLK(0x2, 0x1) 673 #define EUSART2_SCLK_PC2 SILABS_DBUS_EUSART2_SCLK(0x2, 0x2) 674 #define EUSART2_SCLK_PC3 SILABS_DBUS_EUSART2_SCLK(0x2, 0x3) 675 #define EUSART2_SCLK_PC4 SILABS_DBUS_EUSART2_SCLK(0x2, 0x4) 676 #define EUSART2_SCLK_PC5 SILABS_DBUS_EUSART2_SCLK(0x2, 0x5) 677 #define EUSART2_SCLK_PC6 SILABS_DBUS_EUSART2_SCLK(0x2, 0x6) 678 #define EUSART2_SCLK_PC7 SILABS_DBUS_EUSART2_SCLK(0x2, 0x7) 679 #define EUSART2_SCLK_PC8 SILABS_DBUS_EUSART2_SCLK(0x2, 0x8) 680 #define EUSART2_SCLK_PC9 SILABS_DBUS_EUSART2_SCLK(0x2, 0x9) 681 #define EUSART2_SCLK_PD0 SILABS_DBUS_EUSART2_SCLK(0x3, 0x0) 682 #define EUSART2_SCLK_PD1 SILABS_DBUS_EUSART2_SCLK(0x3, 0x1) 683 #define EUSART2_SCLK_PD2 SILABS_DBUS_EUSART2_SCLK(0x3, 0x2) 684 #define EUSART2_SCLK_PD3 SILABS_DBUS_EUSART2_SCLK(0x3, 0x3) 685 #define EUSART2_SCLK_PD4 SILABS_DBUS_EUSART2_SCLK(0x3, 0x4) 686 #define EUSART2_SCLK_PD5 SILABS_DBUS_EUSART2_SCLK(0x3, 0x5) 687 #define EUSART2_TX_PC0 SILABS_DBUS_EUSART2_TX(0x2, 0x0) 688 #define EUSART2_TX_PC1 SILABS_DBUS_EUSART2_TX(0x2, 0x1) 689 #define EUSART2_TX_PC2 SILABS_DBUS_EUSART2_TX(0x2, 0x2) 690 #define EUSART2_TX_PC3 SILABS_DBUS_EUSART2_TX(0x2, 0x3) 691 #define EUSART2_TX_PC4 SILABS_DBUS_EUSART2_TX(0x2, 0x4) 692 #define EUSART2_TX_PC5 SILABS_DBUS_EUSART2_TX(0x2, 0x5) 693 #define EUSART2_TX_PC6 SILABS_DBUS_EUSART2_TX(0x2, 0x6) 694 #define EUSART2_TX_PC7 SILABS_DBUS_EUSART2_TX(0x2, 0x7) 695 #define EUSART2_TX_PC8 SILABS_DBUS_EUSART2_TX(0x2, 0x8) 696 #define EUSART2_TX_PC9 SILABS_DBUS_EUSART2_TX(0x2, 0x9) 697 #define EUSART2_TX_PD0 SILABS_DBUS_EUSART2_TX(0x3, 0x0) 698 #define EUSART2_TX_PD1 SILABS_DBUS_EUSART2_TX(0x3, 0x1) 699 #define EUSART2_TX_PD2 SILABS_DBUS_EUSART2_TX(0x3, 0x2) 700 #define EUSART2_TX_PD3 SILABS_DBUS_EUSART2_TX(0x3, 0x3) 701 #define EUSART2_TX_PD4 SILABS_DBUS_EUSART2_TX(0x3, 0x4) 702 #define EUSART2_TX_PD5 SILABS_DBUS_EUSART2_TX(0x3, 0x5) 703 #define EUSART2_CTS_PC0 SILABS_DBUS_EUSART2_CTS(0x2, 0x0) 704 #define EUSART2_CTS_PC1 SILABS_DBUS_EUSART2_CTS(0x2, 0x1) 705 #define EUSART2_CTS_PC2 SILABS_DBUS_EUSART2_CTS(0x2, 0x2) 706 #define EUSART2_CTS_PC3 SILABS_DBUS_EUSART2_CTS(0x2, 0x3) 707 #define EUSART2_CTS_PC4 SILABS_DBUS_EUSART2_CTS(0x2, 0x4) 708 #define EUSART2_CTS_PC5 SILABS_DBUS_EUSART2_CTS(0x2, 0x5) 709 #define EUSART2_CTS_PC6 SILABS_DBUS_EUSART2_CTS(0x2, 0x6) 710 #define EUSART2_CTS_PC7 SILABS_DBUS_EUSART2_CTS(0x2, 0x7) 711 #define EUSART2_CTS_PC8 SILABS_DBUS_EUSART2_CTS(0x2, 0x8) 712 #define EUSART2_CTS_PC9 SILABS_DBUS_EUSART2_CTS(0x2, 0x9) 713 #define EUSART2_CTS_PD0 SILABS_DBUS_EUSART2_CTS(0x3, 0x0) 714 #define EUSART2_CTS_PD1 SILABS_DBUS_EUSART2_CTS(0x3, 0x1) 715 #define EUSART2_CTS_PD2 SILABS_DBUS_EUSART2_CTS(0x3, 0x2) 716 #define EUSART2_CTS_PD3 SILABS_DBUS_EUSART2_CTS(0x3, 0x3) 717 #define EUSART2_CTS_PD4 SILABS_DBUS_EUSART2_CTS(0x3, 0x4) 718 #define EUSART2_CTS_PD5 SILABS_DBUS_EUSART2_CTS(0x3, 0x5) 719 720 #define PTI_DCLK_PC0 SILABS_DBUS_PTI_DCLK(0x2, 0x0) 721 #define PTI_DCLK_PC1 SILABS_DBUS_PTI_DCLK(0x2, 0x1) 722 #define PTI_DCLK_PC2 SILABS_DBUS_PTI_DCLK(0x2, 0x2) 723 #define PTI_DCLK_PC3 SILABS_DBUS_PTI_DCLK(0x2, 0x3) 724 #define PTI_DCLK_PC4 SILABS_DBUS_PTI_DCLK(0x2, 0x4) 725 #define PTI_DCLK_PC5 SILABS_DBUS_PTI_DCLK(0x2, 0x5) 726 #define PTI_DCLK_PC6 SILABS_DBUS_PTI_DCLK(0x2, 0x6) 727 #define PTI_DCLK_PC7 SILABS_DBUS_PTI_DCLK(0x2, 0x7) 728 #define PTI_DCLK_PC8 SILABS_DBUS_PTI_DCLK(0x2, 0x8) 729 #define PTI_DCLK_PC9 SILABS_DBUS_PTI_DCLK(0x2, 0x9) 730 #define PTI_DCLK_PD0 SILABS_DBUS_PTI_DCLK(0x3, 0x0) 731 #define PTI_DCLK_PD1 SILABS_DBUS_PTI_DCLK(0x3, 0x1) 732 #define PTI_DCLK_PD2 SILABS_DBUS_PTI_DCLK(0x3, 0x2) 733 #define PTI_DCLK_PD3 SILABS_DBUS_PTI_DCLK(0x3, 0x3) 734 #define PTI_DCLK_PD4 SILABS_DBUS_PTI_DCLK(0x3, 0x4) 735 #define PTI_DCLK_PD5 SILABS_DBUS_PTI_DCLK(0x3, 0x5) 736 #define PTI_DFRAME_PC0 SILABS_DBUS_PTI_DFRAME(0x2, 0x0) 737 #define PTI_DFRAME_PC1 SILABS_DBUS_PTI_DFRAME(0x2, 0x1) 738 #define PTI_DFRAME_PC2 SILABS_DBUS_PTI_DFRAME(0x2, 0x2) 739 #define PTI_DFRAME_PC3 SILABS_DBUS_PTI_DFRAME(0x2, 0x3) 740 #define PTI_DFRAME_PC4 SILABS_DBUS_PTI_DFRAME(0x2, 0x4) 741 #define PTI_DFRAME_PC5 SILABS_DBUS_PTI_DFRAME(0x2, 0x5) 742 #define PTI_DFRAME_PC6 SILABS_DBUS_PTI_DFRAME(0x2, 0x6) 743 #define PTI_DFRAME_PC7 SILABS_DBUS_PTI_DFRAME(0x2, 0x7) 744 #define PTI_DFRAME_PC8 SILABS_DBUS_PTI_DFRAME(0x2, 0x8) 745 #define PTI_DFRAME_PC9 SILABS_DBUS_PTI_DFRAME(0x2, 0x9) 746 #define PTI_DFRAME_PD0 SILABS_DBUS_PTI_DFRAME(0x3, 0x0) 747 #define PTI_DFRAME_PD1 SILABS_DBUS_PTI_DFRAME(0x3, 0x1) 748 #define PTI_DFRAME_PD2 SILABS_DBUS_PTI_DFRAME(0x3, 0x2) 749 #define PTI_DFRAME_PD3 SILABS_DBUS_PTI_DFRAME(0x3, 0x3) 750 #define PTI_DFRAME_PD4 SILABS_DBUS_PTI_DFRAME(0x3, 0x4) 751 #define PTI_DFRAME_PD5 SILABS_DBUS_PTI_DFRAME(0x3, 0x5) 752 #define PTI_DOUT_PC0 SILABS_DBUS_PTI_DOUT(0x2, 0x0) 753 #define PTI_DOUT_PC1 SILABS_DBUS_PTI_DOUT(0x2, 0x1) 754 #define PTI_DOUT_PC2 SILABS_DBUS_PTI_DOUT(0x2, 0x2) 755 #define PTI_DOUT_PC3 SILABS_DBUS_PTI_DOUT(0x2, 0x3) 756 #define PTI_DOUT_PC4 SILABS_DBUS_PTI_DOUT(0x2, 0x4) 757 #define PTI_DOUT_PC5 SILABS_DBUS_PTI_DOUT(0x2, 0x5) 758 #define PTI_DOUT_PC6 SILABS_DBUS_PTI_DOUT(0x2, 0x6) 759 #define PTI_DOUT_PC7 SILABS_DBUS_PTI_DOUT(0x2, 0x7) 760 #define PTI_DOUT_PC8 SILABS_DBUS_PTI_DOUT(0x2, 0x8) 761 #define PTI_DOUT_PC9 SILABS_DBUS_PTI_DOUT(0x2, 0x9) 762 #define PTI_DOUT_PD0 SILABS_DBUS_PTI_DOUT(0x3, 0x0) 763 #define PTI_DOUT_PD1 SILABS_DBUS_PTI_DOUT(0x3, 0x1) 764 #define PTI_DOUT_PD2 SILABS_DBUS_PTI_DOUT(0x3, 0x2) 765 #define PTI_DOUT_PD3 SILABS_DBUS_PTI_DOUT(0x3, 0x3) 766 #define PTI_DOUT_PD4 SILABS_DBUS_PTI_DOUT(0x3, 0x4) 767 #define PTI_DOUT_PD5 SILABS_DBUS_PTI_DOUT(0x3, 0x5) 768 769 #define I2C0_SCL_PA0 SILABS_DBUS_I2C0_SCL(0x0, 0x0) 770 #define I2C0_SCL_PA1 SILABS_DBUS_I2C0_SCL(0x0, 0x1) 771 #define I2C0_SCL_PA2 SILABS_DBUS_I2C0_SCL(0x0, 0x2) 772 #define I2C0_SCL_PA3 SILABS_DBUS_I2C0_SCL(0x0, 0x3) 773 #define I2C0_SCL_PA4 SILABS_DBUS_I2C0_SCL(0x0, 0x4) 774 #define I2C0_SCL_PA5 SILABS_DBUS_I2C0_SCL(0x0, 0x5) 775 #define I2C0_SCL_PA6 SILABS_DBUS_I2C0_SCL(0x0, 0x6) 776 #define I2C0_SCL_PA7 SILABS_DBUS_I2C0_SCL(0x0, 0x7) 777 #define I2C0_SCL_PA8 SILABS_DBUS_I2C0_SCL(0x0, 0x8) 778 #define I2C0_SCL_PA9 SILABS_DBUS_I2C0_SCL(0x0, 0x9) 779 #define I2C0_SCL_PA10 SILABS_DBUS_I2C0_SCL(0x0, 0xa) 780 #define I2C0_SCL_PB0 SILABS_DBUS_I2C0_SCL(0x1, 0x0) 781 #define I2C0_SCL_PB1 SILABS_DBUS_I2C0_SCL(0x1, 0x1) 782 #define I2C0_SCL_PB2 SILABS_DBUS_I2C0_SCL(0x1, 0x2) 783 #define I2C0_SCL_PB3 SILABS_DBUS_I2C0_SCL(0x1, 0x3) 784 #define I2C0_SCL_PB4 SILABS_DBUS_I2C0_SCL(0x1, 0x4) 785 #define I2C0_SCL_PB5 SILABS_DBUS_I2C0_SCL(0x1, 0x5) 786 #define I2C0_SCL_PB6 SILABS_DBUS_I2C0_SCL(0x1, 0x6) 787 #define I2C0_SCL_PC0 SILABS_DBUS_I2C0_SCL(0x2, 0x0) 788 #define I2C0_SCL_PC1 SILABS_DBUS_I2C0_SCL(0x2, 0x1) 789 #define I2C0_SCL_PC2 SILABS_DBUS_I2C0_SCL(0x2, 0x2) 790 #define I2C0_SCL_PC3 SILABS_DBUS_I2C0_SCL(0x2, 0x3) 791 #define I2C0_SCL_PC4 SILABS_DBUS_I2C0_SCL(0x2, 0x4) 792 #define I2C0_SCL_PC5 SILABS_DBUS_I2C0_SCL(0x2, 0x5) 793 #define I2C0_SCL_PC6 SILABS_DBUS_I2C0_SCL(0x2, 0x6) 794 #define I2C0_SCL_PC7 SILABS_DBUS_I2C0_SCL(0x2, 0x7) 795 #define I2C0_SCL_PC8 SILABS_DBUS_I2C0_SCL(0x2, 0x8) 796 #define I2C0_SCL_PC9 SILABS_DBUS_I2C0_SCL(0x2, 0x9) 797 #define I2C0_SCL_PD0 SILABS_DBUS_I2C0_SCL(0x3, 0x0) 798 #define I2C0_SCL_PD1 SILABS_DBUS_I2C0_SCL(0x3, 0x1) 799 #define I2C0_SCL_PD2 SILABS_DBUS_I2C0_SCL(0x3, 0x2) 800 #define I2C0_SCL_PD3 SILABS_DBUS_I2C0_SCL(0x3, 0x3) 801 #define I2C0_SCL_PD4 SILABS_DBUS_I2C0_SCL(0x3, 0x4) 802 #define I2C0_SCL_PD5 SILABS_DBUS_I2C0_SCL(0x3, 0x5) 803 #define I2C0_SDA_PA0 SILABS_DBUS_I2C0_SDA(0x0, 0x0) 804 #define I2C0_SDA_PA1 SILABS_DBUS_I2C0_SDA(0x0, 0x1) 805 #define I2C0_SDA_PA2 SILABS_DBUS_I2C0_SDA(0x0, 0x2) 806 #define I2C0_SDA_PA3 SILABS_DBUS_I2C0_SDA(0x0, 0x3) 807 #define I2C0_SDA_PA4 SILABS_DBUS_I2C0_SDA(0x0, 0x4) 808 #define I2C0_SDA_PA5 SILABS_DBUS_I2C0_SDA(0x0, 0x5) 809 #define I2C0_SDA_PA6 SILABS_DBUS_I2C0_SDA(0x0, 0x6) 810 #define I2C0_SDA_PA7 SILABS_DBUS_I2C0_SDA(0x0, 0x7) 811 #define I2C0_SDA_PA8 SILABS_DBUS_I2C0_SDA(0x0, 0x8) 812 #define I2C0_SDA_PA9 SILABS_DBUS_I2C0_SDA(0x0, 0x9) 813 #define I2C0_SDA_PA10 SILABS_DBUS_I2C0_SDA(0x0, 0xa) 814 #define I2C0_SDA_PB0 SILABS_DBUS_I2C0_SDA(0x1, 0x0) 815 #define I2C0_SDA_PB1 SILABS_DBUS_I2C0_SDA(0x1, 0x1) 816 #define I2C0_SDA_PB2 SILABS_DBUS_I2C0_SDA(0x1, 0x2) 817 #define I2C0_SDA_PB3 SILABS_DBUS_I2C0_SDA(0x1, 0x3) 818 #define I2C0_SDA_PB4 SILABS_DBUS_I2C0_SDA(0x1, 0x4) 819 #define I2C0_SDA_PB5 SILABS_DBUS_I2C0_SDA(0x1, 0x5) 820 #define I2C0_SDA_PB6 SILABS_DBUS_I2C0_SDA(0x1, 0x6) 821 #define I2C0_SDA_PC0 SILABS_DBUS_I2C0_SDA(0x2, 0x0) 822 #define I2C0_SDA_PC1 SILABS_DBUS_I2C0_SDA(0x2, 0x1) 823 #define I2C0_SDA_PC2 SILABS_DBUS_I2C0_SDA(0x2, 0x2) 824 #define I2C0_SDA_PC3 SILABS_DBUS_I2C0_SDA(0x2, 0x3) 825 #define I2C0_SDA_PC4 SILABS_DBUS_I2C0_SDA(0x2, 0x4) 826 #define I2C0_SDA_PC5 SILABS_DBUS_I2C0_SDA(0x2, 0x5) 827 #define I2C0_SDA_PC6 SILABS_DBUS_I2C0_SDA(0x2, 0x6) 828 #define I2C0_SDA_PC7 SILABS_DBUS_I2C0_SDA(0x2, 0x7) 829 #define I2C0_SDA_PC8 SILABS_DBUS_I2C0_SDA(0x2, 0x8) 830 #define I2C0_SDA_PC9 SILABS_DBUS_I2C0_SDA(0x2, 0x9) 831 #define I2C0_SDA_PD0 SILABS_DBUS_I2C0_SDA(0x3, 0x0) 832 #define I2C0_SDA_PD1 SILABS_DBUS_I2C0_SDA(0x3, 0x1) 833 #define I2C0_SDA_PD2 SILABS_DBUS_I2C0_SDA(0x3, 0x2) 834 #define I2C0_SDA_PD3 SILABS_DBUS_I2C0_SDA(0x3, 0x3) 835 #define I2C0_SDA_PD4 SILABS_DBUS_I2C0_SDA(0x3, 0x4) 836 #define I2C0_SDA_PD5 SILABS_DBUS_I2C0_SDA(0x3, 0x5) 837 838 #define I2C1_SCL_PC0 SILABS_DBUS_I2C1_SCL(0x2, 0x0) 839 #define I2C1_SCL_PC1 SILABS_DBUS_I2C1_SCL(0x2, 0x1) 840 #define I2C1_SCL_PC2 SILABS_DBUS_I2C1_SCL(0x2, 0x2) 841 #define I2C1_SCL_PC3 SILABS_DBUS_I2C1_SCL(0x2, 0x3) 842 #define I2C1_SCL_PC4 SILABS_DBUS_I2C1_SCL(0x2, 0x4) 843 #define I2C1_SCL_PC5 SILABS_DBUS_I2C1_SCL(0x2, 0x5) 844 #define I2C1_SCL_PC6 SILABS_DBUS_I2C1_SCL(0x2, 0x6) 845 #define I2C1_SCL_PC7 SILABS_DBUS_I2C1_SCL(0x2, 0x7) 846 #define I2C1_SCL_PC8 SILABS_DBUS_I2C1_SCL(0x2, 0x8) 847 #define I2C1_SCL_PC9 SILABS_DBUS_I2C1_SCL(0x2, 0x9) 848 #define I2C1_SCL_PD0 SILABS_DBUS_I2C1_SCL(0x3, 0x0) 849 #define I2C1_SCL_PD1 SILABS_DBUS_I2C1_SCL(0x3, 0x1) 850 #define I2C1_SCL_PD2 SILABS_DBUS_I2C1_SCL(0x3, 0x2) 851 #define I2C1_SCL_PD3 SILABS_DBUS_I2C1_SCL(0x3, 0x3) 852 #define I2C1_SCL_PD4 SILABS_DBUS_I2C1_SCL(0x3, 0x4) 853 #define I2C1_SCL_PD5 SILABS_DBUS_I2C1_SCL(0x3, 0x5) 854 #define I2C1_SDA_PC0 SILABS_DBUS_I2C1_SDA(0x2, 0x0) 855 #define I2C1_SDA_PC1 SILABS_DBUS_I2C1_SDA(0x2, 0x1) 856 #define I2C1_SDA_PC2 SILABS_DBUS_I2C1_SDA(0x2, 0x2) 857 #define I2C1_SDA_PC3 SILABS_DBUS_I2C1_SDA(0x2, 0x3) 858 #define I2C1_SDA_PC4 SILABS_DBUS_I2C1_SDA(0x2, 0x4) 859 #define I2C1_SDA_PC5 SILABS_DBUS_I2C1_SDA(0x2, 0x5) 860 #define I2C1_SDA_PC6 SILABS_DBUS_I2C1_SDA(0x2, 0x6) 861 #define I2C1_SDA_PC7 SILABS_DBUS_I2C1_SDA(0x2, 0x7) 862 #define I2C1_SDA_PC8 SILABS_DBUS_I2C1_SDA(0x2, 0x8) 863 #define I2C1_SDA_PC9 SILABS_DBUS_I2C1_SDA(0x2, 0x9) 864 #define I2C1_SDA_PD0 SILABS_DBUS_I2C1_SDA(0x3, 0x0) 865 #define I2C1_SDA_PD1 SILABS_DBUS_I2C1_SDA(0x3, 0x1) 866 #define I2C1_SDA_PD2 SILABS_DBUS_I2C1_SDA(0x3, 0x2) 867 #define I2C1_SDA_PD3 SILABS_DBUS_I2C1_SDA(0x3, 0x3) 868 #define I2C1_SDA_PD4 SILABS_DBUS_I2C1_SDA(0x3, 0x4) 869 #define I2C1_SDA_PD5 SILABS_DBUS_I2C1_SDA(0x3, 0x5) 870 871 #define KEYSCAN_COLOUT0_PA0 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x0) 872 #define KEYSCAN_COLOUT0_PA1 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x1) 873 #define KEYSCAN_COLOUT0_PA2 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x2) 874 #define KEYSCAN_COLOUT0_PA3 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x3) 875 #define KEYSCAN_COLOUT0_PA4 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x4) 876 #define KEYSCAN_COLOUT0_PA5 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x5) 877 #define KEYSCAN_COLOUT0_PA6 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x6) 878 #define KEYSCAN_COLOUT0_PA7 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x7) 879 #define KEYSCAN_COLOUT0_PA8 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x8) 880 #define KEYSCAN_COLOUT0_PA9 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0x9) 881 #define KEYSCAN_COLOUT0_PA10 SILABS_DBUS_KEYSCAN_COLOUT0(0x0, 0xa) 882 #define KEYSCAN_COLOUT0_PB0 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x0) 883 #define KEYSCAN_COLOUT0_PB1 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x1) 884 #define KEYSCAN_COLOUT0_PB2 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x2) 885 #define KEYSCAN_COLOUT0_PB3 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x3) 886 #define KEYSCAN_COLOUT0_PB4 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x4) 887 #define KEYSCAN_COLOUT0_PB5 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x5) 888 #define KEYSCAN_COLOUT0_PB6 SILABS_DBUS_KEYSCAN_COLOUT0(0x1, 0x6) 889 #define KEYSCAN_COLOUT0_PC0 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x0) 890 #define KEYSCAN_COLOUT0_PC1 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x1) 891 #define KEYSCAN_COLOUT0_PC2 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x2) 892 #define KEYSCAN_COLOUT0_PC3 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x3) 893 #define KEYSCAN_COLOUT0_PC4 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x4) 894 #define KEYSCAN_COLOUT0_PC5 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x5) 895 #define KEYSCAN_COLOUT0_PC6 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x6) 896 #define KEYSCAN_COLOUT0_PC7 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x7) 897 #define KEYSCAN_COLOUT0_PC8 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x8) 898 #define KEYSCAN_COLOUT0_PC9 SILABS_DBUS_KEYSCAN_COLOUT0(0x2, 0x9) 899 #define KEYSCAN_COLOUT0_PD0 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x0) 900 #define KEYSCAN_COLOUT0_PD1 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x1) 901 #define KEYSCAN_COLOUT0_PD2 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x2) 902 #define KEYSCAN_COLOUT0_PD3 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x3) 903 #define KEYSCAN_COLOUT0_PD4 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x4) 904 #define KEYSCAN_COLOUT0_PD5 SILABS_DBUS_KEYSCAN_COLOUT0(0x3, 0x5) 905 #define KEYSCAN_COLOUT1_PA0 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x0) 906 #define KEYSCAN_COLOUT1_PA1 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x1) 907 #define KEYSCAN_COLOUT1_PA2 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x2) 908 #define KEYSCAN_COLOUT1_PA3 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x3) 909 #define KEYSCAN_COLOUT1_PA4 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x4) 910 #define KEYSCAN_COLOUT1_PA5 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x5) 911 #define KEYSCAN_COLOUT1_PA6 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x6) 912 #define KEYSCAN_COLOUT1_PA7 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x7) 913 #define KEYSCAN_COLOUT1_PA8 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x8) 914 #define KEYSCAN_COLOUT1_PA9 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0x9) 915 #define KEYSCAN_COLOUT1_PA10 SILABS_DBUS_KEYSCAN_COLOUT1(0x0, 0xa) 916 #define KEYSCAN_COLOUT1_PB0 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x0) 917 #define KEYSCAN_COLOUT1_PB1 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x1) 918 #define KEYSCAN_COLOUT1_PB2 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x2) 919 #define KEYSCAN_COLOUT1_PB3 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x3) 920 #define KEYSCAN_COLOUT1_PB4 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x4) 921 #define KEYSCAN_COLOUT1_PB5 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x5) 922 #define KEYSCAN_COLOUT1_PB6 SILABS_DBUS_KEYSCAN_COLOUT1(0x1, 0x6) 923 #define KEYSCAN_COLOUT1_PC0 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x0) 924 #define KEYSCAN_COLOUT1_PC1 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x1) 925 #define KEYSCAN_COLOUT1_PC2 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x2) 926 #define KEYSCAN_COLOUT1_PC3 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x3) 927 #define KEYSCAN_COLOUT1_PC4 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x4) 928 #define KEYSCAN_COLOUT1_PC5 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x5) 929 #define KEYSCAN_COLOUT1_PC6 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x6) 930 #define KEYSCAN_COLOUT1_PC7 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x7) 931 #define KEYSCAN_COLOUT1_PC8 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x8) 932 #define KEYSCAN_COLOUT1_PC9 SILABS_DBUS_KEYSCAN_COLOUT1(0x2, 0x9) 933 #define KEYSCAN_COLOUT1_PD0 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x0) 934 #define KEYSCAN_COLOUT1_PD1 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x1) 935 #define KEYSCAN_COLOUT1_PD2 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x2) 936 #define KEYSCAN_COLOUT1_PD3 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x3) 937 #define KEYSCAN_COLOUT1_PD4 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x4) 938 #define KEYSCAN_COLOUT1_PD5 SILABS_DBUS_KEYSCAN_COLOUT1(0x3, 0x5) 939 #define KEYSCAN_COLOUT2_PA0 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x0) 940 #define KEYSCAN_COLOUT2_PA1 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x1) 941 #define KEYSCAN_COLOUT2_PA2 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x2) 942 #define KEYSCAN_COLOUT2_PA3 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x3) 943 #define KEYSCAN_COLOUT2_PA4 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x4) 944 #define KEYSCAN_COLOUT2_PA5 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x5) 945 #define KEYSCAN_COLOUT2_PA6 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x6) 946 #define KEYSCAN_COLOUT2_PA7 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x7) 947 #define KEYSCAN_COLOUT2_PA8 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x8) 948 #define KEYSCAN_COLOUT2_PA9 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0x9) 949 #define KEYSCAN_COLOUT2_PA10 SILABS_DBUS_KEYSCAN_COLOUT2(0x0, 0xa) 950 #define KEYSCAN_COLOUT2_PB0 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x0) 951 #define KEYSCAN_COLOUT2_PB1 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x1) 952 #define KEYSCAN_COLOUT2_PB2 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x2) 953 #define KEYSCAN_COLOUT2_PB3 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x3) 954 #define KEYSCAN_COLOUT2_PB4 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x4) 955 #define KEYSCAN_COLOUT2_PB5 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x5) 956 #define KEYSCAN_COLOUT2_PB6 SILABS_DBUS_KEYSCAN_COLOUT2(0x1, 0x6) 957 #define KEYSCAN_COLOUT2_PC0 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x0) 958 #define KEYSCAN_COLOUT2_PC1 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x1) 959 #define KEYSCAN_COLOUT2_PC2 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x2) 960 #define KEYSCAN_COLOUT2_PC3 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x3) 961 #define KEYSCAN_COLOUT2_PC4 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x4) 962 #define KEYSCAN_COLOUT2_PC5 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x5) 963 #define KEYSCAN_COLOUT2_PC6 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x6) 964 #define KEYSCAN_COLOUT2_PC7 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x7) 965 #define KEYSCAN_COLOUT2_PC8 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x8) 966 #define KEYSCAN_COLOUT2_PC9 SILABS_DBUS_KEYSCAN_COLOUT2(0x2, 0x9) 967 #define KEYSCAN_COLOUT2_PD0 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x0) 968 #define KEYSCAN_COLOUT2_PD1 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x1) 969 #define KEYSCAN_COLOUT2_PD2 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x2) 970 #define KEYSCAN_COLOUT2_PD3 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x3) 971 #define KEYSCAN_COLOUT2_PD4 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x4) 972 #define KEYSCAN_COLOUT2_PD5 SILABS_DBUS_KEYSCAN_COLOUT2(0x3, 0x5) 973 #define KEYSCAN_COLOUT3_PA0 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x0) 974 #define KEYSCAN_COLOUT3_PA1 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x1) 975 #define KEYSCAN_COLOUT3_PA2 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x2) 976 #define KEYSCAN_COLOUT3_PA3 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x3) 977 #define KEYSCAN_COLOUT3_PA4 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x4) 978 #define KEYSCAN_COLOUT3_PA5 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x5) 979 #define KEYSCAN_COLOUT3_PA6 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x6) 980 #define KEYSCAN_COLOUT3_PA7 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x7) 981 #define KEYSCAN_COLOUT3_PA8 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x8) 982 #define KEYSCAN_COLOUT3_PA9 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0x9) 983 #define KEYSCAN_COLOUT3_PA10 SILABS_DBUS_KEYSCAN_COLOUT3(0x0, 0xa) 984 #define KEYSCAN_COLOUT3_PB0 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x0) 985 #define KEYSCAN_COLOUT3_PB1 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x1) 986 #define KEYSCAN_COLOUT3_PB2 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x2) 987 #define KEYSCAN_COLOUT3_PB3 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x3) 988 #define KEYSCAN_COLOUT3_PB4 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x4) 989 #define KEYSCAN_COLOUT3_PB5 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x5) 990 #define KEYSCAN_COLOUT3_PB6 SILABS_DBUS_KEYSCAN_COLOUT3(0x1, 0x6) 991 #define KEYSCAN_COLOUT3_PC0 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x0) 992 #define KEYSCAN_COLOUT3_PC1 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x1) 993 #define KEYSCAN_COLOUT3_PC2 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x2) 994 #define KEYSCAN_COLOUT3_PC3 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x3) 995 #define KEYSCAN_COLOUT3_PC4 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x4) 996 #define KEYSCAN_COLOUT3_PC5 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x5) 997 #define KEYSCAN_COLOUT3_PC6 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x6) 998 #define KEYSCAN_COLOUT3_PC7 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x7) 999 #define KEYSCAN_COLOUT3_PC8 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x8) 1000 #define KEYSCAN_COLOUT3_PC9 SILABS_DBUS_KEYSCAN_COLOUT3(0x2, 0x9) 1001 #define KEYSCAN_COLOUT3_PD0 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x0) 1002 #define KEYSCAN_COLOUT3_PD1 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x1) 1003 #define KEYSCAN_COLOUT3_PD2 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x2) 1004 #define KEYSCAN_COLOUT3_PD3 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x3) 1005 #define KEYSCAN_COLOUT3_PD4 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x4) 1006 #define KEYSCAN_COLOUT3_PD5 SILABS_DBUS_KEYSCAN_COLOUT3(0x3, 0x5) 1007 #define KEYSCAN_COLOUT4_PA0 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x0) 1008 #define KEYSCAN_COLOUT4_PA1 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x1) 1009 #define KEYSCAN_COLOUT4_PA2 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x2) 1010 #define KEYSCAN_COLOUT4_PA3 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x3) 1011 #define KEYSCAN_COLOUT4_PA4 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x4) 1012 #define KEYSCAN_COLOUT4_PA5 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x5) 1013 #define KEYSCAN_COLOUT4_PA6 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x6) 1014 #define KEYSCAN_COLOUT4_PA7 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x7) 1015 #define KEYSCAN_COLOUT4_PA8 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x8) 1016 #define KEYSCAN_COLOUT4_PA9 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0x9) 1017 #define KEYSCAN_COLOUT4_PA10 SILABS_DBUS_KEYSCAN_COLOUT4(0x0, 0xa) 1018 #define KEYSCAN_COLOUT4_PB0 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x0) 1019 #define KEYSCAN_COLOUT4_PB1 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x1) 1020 #define KEYSCAN_COLOUT4_PB2 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x2) 1021 #define KEYSCAN_COLOUT4_PB3 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x3) 1022 #define KEYSCAN_COLOUT4_PB4 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x4) 1023 #define KEYSCAN_COLOUT4_PB5 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x5) 1024 #define KEYSCAN_COLOUT4_PB6 SILABS_DBUS_KEYSCAN_COLOUT4(0x1, 0x6) 1025 #define KEYSCAN_COLOUT4_PC0 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x0) 1026 #define KEYSCAN_COLOUT4_PC1 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x1) 1027 #define KEYSCAN_COLOUT4_PC2 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x2) 1028 #define KEYSCAN_COLOUT4_PC3 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x3) 1029 #define KEYSCAN_COLOUT4_PC4 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x4) 1030 #define KEYSCAN_COLOUT4_PC5 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x5) 1031 #define KEYSCAN_COLOUT4_PC6 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x6) 1032 #define KEYSCAN_COLOUT4_PC7 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x7) 1033 #define KEYSCAN_COLOUT4_PC8 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x8) 1034 #define KEYSCAN_COLOUT4_PC9 SILABS_DBUS_KEYSCAN_COLOUT4(0x2, 0x9) 1035 #define KEYSCAN_COLOUT4_PD0 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x0) 1036 #define KEYSCAN_COLOUT4_PD1 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x1) 1037 #define KEYSCAN_COLOUT4_PD2 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x2) 1038 #define KEYSCAN_COLOUT4_PD3 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x3) 1039 #define KEYSCAN_COLOUT4_PD4 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x4) 1040 #define KEYSCAN_COLOUT4_PD5 SILABS_DBUS_KEYSCAN_COLOUT4(0x3, 0x5) 1041 #define KEYSCAN_COLOUT5_PA0 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x0) 1042 #define KEYSCAN_COLOUT5_PA1 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x1) 1043 #define KEYSCAN_COLOUT5_PA2 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x2) 1044 #define KEYSCAN_COLOUT5_PA3 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x3) 1045 #define KEYSCAN_COLOUT5_PA4 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x4) 1046 #define KEYSCAN_COLOUT5_PA5 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x5) 1047 #define KEYSCAN_COLOUT5_PA6 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x6) 1048 #define KEYSCAN_COLOUT5_PA7 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x7) 1049 #define KEYSCAN_COLOUT5_PA8 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x8) 1050 #define KEYSCAN_COLOUT5_PA9 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0x9) 1051 #define KEYSCAN_COLOUT5_PA10 SILABS_DBUS_KEYSCAN_COLOUT5(0x0, 0xa) 1052 #define KEYSCAN_COLOUT5_PB0 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x0) 1053 #define KEYSCAN_COLOUT5_PB1 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x1) 1054 #define KEYSCAN_COLOUT5_PB2 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x2) 1055 #define KEYSCAN_COLOUT5_PB3 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x3) 1056 #define KEYSCAN_COLOUT5_PB4 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x4) 1057 #define KEYSCAN_COLOUT5_PB5 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x5) 1058 #define KEYSCAN_COLOUT5_PB6 SILABS_DBUS_KEYSCAN_COLOUT5(0x1, 0x6) 1059 #define KEYSCAN_COLOUT5_PC0 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x0) 1060 #define KEYSCAN_COLOUT5_PC1 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x1) 1061 #define KEYSCAN_COLOUT5_PC2 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x2) 1062 #define KEYSCAN_COLOUT5_PC3 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x3) 1063 #define KEYSCAN_COLOUT5_PC4 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x4) 1064 #define KEYSCAN_COLOUT5_PC5 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x5) 1065 #define KEYSCAN_COLOUT5_PC6 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x6) 1066 #define KEYSCAN_COLOUT5_PC7 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x7) 1067 #define KEYSCAN_COLOUT5_PC8 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x8) 1068 #define KEYSCAN_COLOUT5_PC9 SILABS_DBUS_KEYSCAN_COLOUT5(0x2, 0x9) 1069 #define KEYSCAN_COLOUT5_PD0 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x0) 1070 #define KEYSCAN_COLOUT5_PD1 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x1) 1071 #define KEYSCAN_COLOUT5_PD2 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x2) 1072 #define KEYSCAN_COLOUT5_PD3 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x3) 1073 #define KEYSCAN_COLOUT5_PD4 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x4) 1074 #define KEYSCAN_COLOUT5_PD5 SILABS_DBUS_KEYSCAN_COLOUT5(0x3, 0x5) 1075 #define KEYSCAN_COLOUT6_PA0 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x0) 1076 #define KEYSCAN_COLOUT6_PA1 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x1) 1077 #define KEYSCAN_COLOUT6_PA2 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x2) 1078 #define KEYSCAN_COLOUT6_PA3 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x3) 1079 #define KEYSCAN_COLOUT6_PA4 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x4) 1080 #define KEYSCAN_COLOUT6_PA5 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x5) 1081 #define KEYSCAN_COLOUT6_PA6 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x6) 1082 #define KEYSCAN_COLOUT6_PA7 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x7) 1083 #define KEYSCAN_COLOUT6_PA8 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x8) 1084 #define KEYSCAN_COLOUT6_PA9 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0x9) 1085 #define KEYSCAN_COLOUT6_PA10 SILABS_DBUS_KEYSCAN_COLOUT6(0x0, 0xa) 1086 #define KEYSCAN_COLOUT6_PB0 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x0) 1087 #define KEYSCAN_COLOUT6_PB1 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x1) 1088 #define KEYSCAN_COLOUT6_PB2 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x2) 1089 #define KEYSCAN_COLOUT6_PB3 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x3) 1090 #define KEYSCAN_COLOUT6_PB4 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x4) 1091 #define KEYSCAN_COLOUT6_PB5 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x5) 1092 #define KEYSCAN_COLOUT6_PB6 SILABS_DBUS_KEYSCAN_COLOUT6(0x1, 0x6) 1093 #define KEYSCAN_COLOUT6_PC0 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x0) 1094 #define KEYSCAN_COLOUT6_PC1 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x1) 1095 #define KEYSCAN_COLOUT6_PC2 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x2) 1096 #define KEYSCAN_COLOUT6_PC3 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x3) 1097 #define KEYSCAN_COLOUT6_PC4 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x4) 1098 #define KEYSCAN_COLOUT6_PC5 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x5) 1099 #define KEYSCAN_COLOUT6_PC6 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x6) 1100 #define KEYSCAN_COLOUT6_PC7 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x7) 1101 #define KEYSCAN_COLOUT6_PC8 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x8) 1102 #define KEYSCAN_COLOUT6_PC9 SILABS_DBUS_KEYSCAN_COLOUT6(0x2, 0x9) 1103 #define KEYSCAN_COLOUT6_PD0 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x0) 1104 #define KEYSCAN_COLOUT6_PD1 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x1) 1105 #define KEYSCAN_COLOUT6_PD2 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x2) 1106 #define KEYSCAN_COLOUT6_PD3 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x3) 1107 #define KEYSCAN_COLOUT6_PD4 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x4) 1108 #define KEYSCAN_COLOUT6_PD5 SILABS_DBUS_KEYSCAN_COLOUT6(0x3, 0x5) 1109 #define KEYSCAN_COLOUT7_PA0 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x0) 1110 #define KEYSCAN_COLOUT7_PA1 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x1) 1111 #define KEYSCAN_COLOUT7_PA2 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x2) 1112 #define KEYSCAN_COLOUT7_PA3 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x3) 1113 #define KEYSCAN_COLOUT7_PA4 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x4) 1114 #define KEYSCAN_COLOUT7_PA5 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x5) 1115 #define KEYSCAN_COLOUT7_PA6 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x6) 1116 #define KEYSCAN_COLOUT7_PA7 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x7) 1117 #define KEYSCAN_COLOUT7_PA8 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x8) 1118 #define KEYSCAN_COLOUT7_PA9 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0x9) 1119 #define KEYSCAN_COLOUT7_PA10 SILABS_DBUS_KEYSCAN_COLOUT7(0x0, 0xa) 1120 #define KEYSCAN_COLOUT7_PB0 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x0) 1121 #define KEYSCAN_COLOUT7_PB1 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x1) 1122 #define KEYSCAN_COLOUT7_PB2 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x2) 1123 #define KEYSCAN_COLOUT7_PB3 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x3) 1124 #define KEYSCAN_COLOUT7_PB4 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x4) 1125 #define KEYSCAN_COLOUT7_PB5 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x5) 1126 #define KEYSCAN_COLOUT7_PB6 SILABS_DBUS_KEYSCAN_COLOUT7(0x1, 0x6) 1127 #define KEYSCAN_COLOUT7_PC0 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x0) 1128 #define KEYSCAN_COLOUT7_PC1 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x1) 1129 #define KEYSCAN_COLOUT7_PC2 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x2) 1130 #define KEYSCAN_COLOUT7_PC3 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x3) 1131 #define KEYSCAN_COLOUT7_PC4 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x4) 1132 #define KEYSCAN_COLOUT7_PC5 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x5) 1133 #define KEYSCAN_COLOUT7_PC6 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x6) 1134 #define KEYSCAN_COLOUT7_PC7 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x7) 1135 #define KEYSCAN_COLOUT7_PC8 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x8) 1136 #define KEYSCAN_COLOUT7_PC9 SILABS_DBUS_KEYSCAN_COLOUT7(0x2, 0x9) 1137 #define KEYSCAN_COLOUT7_PD0 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x0) 1138 #define KEYSCAN_COLOUT7_PD1 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x1) 1139 #define KEYSCAN_COLOUT7_PD2 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x2) 1140 #define KEYSCAN_COLOUT7_PD3 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x3) 1141 #define KEYSCAN_COLOUT7_PD4 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x4) 1142 #define KEYSCAN_COLOUT7_PD5 SILABS_DBUS_KEYSCAN_COLOUT7(0x3, 0x5) 1143 #define KEYSCAN_ROWSENSE0_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x0) 1144 #define KEYSCAN_ROWSENSE0_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x1) 1145 #define KEYSCAN_ROWSENSE0_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x2) 1146 #define KEYSCAN_ROWSENSE0_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x3) 1147 #define KEYSCAN_ROWSENSE0_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x4) 1148 #define KEYSCAN_ROWSENSE0_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x5) 1149 #define KEYSCAN_ROWSENSE0_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x6) 1150 #define KEYSCAN_ROWSENSE0_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x7) 1151 #define KEYSCAN_ROWSENSE0_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x8) 1152 #define KEYSCAN_ROWSENSE0_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0x9) 1153 #define KEYSCAN_ROWSENSE0_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x0, 0xa) 1154 #define KEYSCAN_ROWSENSE0_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x0) 1155 #define KEYSCAN_ROWSENSE0_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x1) 1156 #define KEYSCAN_ROWSENSE0_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x2) 1157 #define KEYSCAN_ROWSENSE0_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x3) 1158 #define KEYSCAN_ROWSENSE0_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x4) 1159 #define KEYSCAN_ROWSENSE0_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x5) 1160 #define KEYSCAN_ROWSENSE0_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE0(0x1, 0x6) 1161 #define KEYSCAN_ROWSENSE1_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x0) 1162 #define KEYSCAN_ROWSENSE1_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x1) 1163 #define KEYSCAN_ROWSENSE1_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x2) 1164 #define KEYSCAN_ROWSENSE1_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x3) 1165 #define KEYSCAN_ROWSENSE1_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x4) 1166 #define KEYSCAN_ROWSENSE1_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x5) 1167 #define KEYSCAN_ROWSENSE1_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x6) 1168 #define KEYSCAN_ROWSENSE1_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x7) 1169 #define KEYSCAN_ROWSENSE1_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x8) 1170 #define KEYSCAN_ROWSENSE1_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0x9) 1171 #define KEYSCAN_ROWSENSE1_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x0, 0xa) 1172 #define KEYSCAN_ROWSENSE1_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x0) 1173 #define KEYSCAN_ROWSENSE1_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x1) 1174 #define KEYSCAN_ROWSENSE1_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x2) 1175 #define KEYSCAN_ROWSENSE1_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x3) 1176 #define KEYSCAN_ROWSENSE1_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x4) 1177 #define KEYSCAN_ROWSENSE1_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x5) 1178 #define KEYSCAN_ROWSENSE1_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE1(0x1, 0x6) 1179 #define KEYSCAN_ROWSENSE2_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x0) 1180 #define KEYSCAN_ROWSENSE2_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x1) 1181 #define KEYSCAN_ROWSENSE2_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x2) 1182 #define KEYSCAN_ROWSENSE2_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x3) 1183 #define KEYSCAN_ROWSENSE2_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x4) 1184 #define KEYSCAN_ROWSENSE2_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x5) 1185 #define KEYSCAN_ROWSENSE2_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x6) 1186 #define KEYSCAN_ROWSENSE2_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x7) 1187 #define KEYSCAN_ROWSENSE2_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x8) 1188 #define KEYSCAN_ROWSENSE2_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0x9) 1189 #define KEYSCAN_ROWSENSE2_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x0, 0xa) 1190 #define KEYSCAN_ROWSENSE2_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x0) 1191 #define KEYSCAN_ROWSENSE2_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x1) 1192 #define KEYSCAN_ROWSENSE2_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x2) 1193 #define KEYSCAN_ROWSENSE2_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x3) 1194 #define KEYSCAN_ROWSENSE2_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x4) 1195 #define KEYSCAN_ROWSENSE2_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x5) 1196 #define KEYSCAN_ROWSENSE2_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE2(0x1, 0x6) 1197 #define KEYSCAN_ROWSENSE3_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x0) 1198 #define KEYSCAN_ROWSENSE3_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x1) 1199 #define KEYSCAN_ROWSENSE3_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x2) 1200 #define KEYSCAN_ROWSENSE3_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x3) 1201 #define KEYSCAN_ROWSENSE3_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x4) 1202 #define KEYSCAN_ROWSENSE3_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x5) 1203 #define KEYSCAN_ROWSENSE3_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x6) 1204 #define KEYSCAN_ROWSENSE3_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x7) 1205 #define KEYSCAN_ROWSENSE3_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x8) 1206 #define KEYSCAN_ROWSENSE3_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0x9) 1207 #define KEYSCAN_ROWSENSE3_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x0, 0xa) 1208 #define KEYSCAN_ROWSENSE3_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x0) 1209 #define KEYSCAN_ROWSENSE3_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x1) 1210 #define KEYSCAN_ROWSENSE3_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x2) 1211 #define KEYSCAN_ROWSENSE3_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x3) 1212 #define KEYSCAN_ROWSENSE3_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x4) 1213 #define KEYSCAN_ROWSENSE3_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x5) 1214 #define KEYSCAN_ROWSENSE3_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE3(0x1, 0x6) 1215 #define KEYSCAN_ROWSENSE4_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x0) 1216 #define KEYSCAN_ROWSENSE4_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x1) 1217 #define KEYSCAN_ROWSENSE4_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x2) 1218 #define KEYSCAN_ROWSENSE4_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x3) 1219 #define KEYSCAN_ROWSENSE4_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x4) 1220 #define KEYSCAN_ROWSENSE4_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x5) 1221 #define KEYSCAN_ROWSENSE4_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x6) 1222 #define KEYSCAN_ROWSENSE4_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x7) 1223 #define KEYSCAN_ROWSENSE4_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x8) 1224 #define KEYSCAN_ROWSENSE4_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0x9) 1225 #define KEYSCAN_ROWSENSE4_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x0, 0xa) 1226 #define KEYSCAN_ROWSENSE4_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x0) 1227 #define KEYSCAN_ROWSENSE4_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x1) 1228 #define KEYSCAN_ROWSENSE4_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x2) 1229 #define KEYSCAN_ROWSENSE4_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x3) 1230 #define KEYSCAN_ROWSENSE4_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x4) 1231 #define KEYSCAN_ROWSENSE4_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x5) 1232 #define KEYSCAN_ROWSENSE4_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE4(0x1, 0x6) 1233 #define KEYSCAN_ROWSENSE5_PA0 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x0) 1234 #define KEYSCAN_ROWSENSE5_PA1 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x1) 1235 #define KEYSCAN_ROWSENSE5_PA2 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x2) 1236 #define KEYSCAN_ROWSENSE5_PA3 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x3) 1237 #define KEYSCAN_ROWSENSE5_PA4 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x4) 1238 #define KEYSCAN_ROWSENSE5_PA5 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x5) 1239 #define KEYSCAN_ROWSENSE5_PA6 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x6) 1240 #define KEYSCAN_ROWSENSE5_PA7 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x7) 1241 #define KEYSCAN_ROWSENSE5_PA8 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x8) 1242 #define KEYSCAN_ROWSENSE5_PA9 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0x9) 1243 #define KEYSCAN_ROWSENSE5_PA10 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x0, 0xa) 1244 #define KEYSCAN_ROWSENSE5_PB0 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x0) 1245 #define KEYSCAN_ROWSENSE5_PB1 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x1) 1246 #define KEYSCAN_ROWSENSE5_PB2 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x2) 1247 #define KEYSCAN_ROWSENSE5_PB3 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x3) 1248 #define KEYSCAN_ROWSENSE5_PB4 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x4) 1249 #define KEYSCAN_ROWSENSE5_PB5 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x5) 1250 #define KEYSCAN_ROWSENSE5_PB6 SILABS_DBUS_KEYSCAN_ROWSENSE5(0x1, 0x6) 1251 1252 #define LESENSE_CH0OUT_PA0 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x0) 1253 #define LESENSE_CH0OUT_PA1 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x1) 1254 #define LESENSE_CH0OUT_PA2 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x2) 1255 #define LESENSE_CH0OUT_PA3 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x3) 1256 #define LESENSE_CH0OUT_PA4 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x4) 1257 #define LESENSE_CH0OUT_PA5 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x5) 1258 #define LESENSE_CH0OUT_PA6 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x6) 1259 #define LESENSE_CH0OUT_PA7 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x7) 1260 #define LESENSE_CH0OUT_PA8 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x8) 1261 #define LESENSE_CH0OUT_PA9 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0x9) 1262 #define LESENSE_CH0OUT_PA10 SILABS_DBUS_LESENSE_CH0OUT(0x0, 0xa) 1263 #define LESENSE_CH0OUT_PB0 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x0) 1264 #define LESENSE_CH0OUT_PB1 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x1) 1265 #define LESENSE_CH0OUT_PB2 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x2) 1266 #define LESENSE_CH0OUT_PB3 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x3) 1267 #define LESENSE_CH0OUT_PB4 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x4) 1268 #define LESENSE_CH0OUT_PB5 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x5) 1269 #define LESENSE_CH0OUT_PB6 SILABS_DBUS_LESENSE_CH0OUT(0x1, 0x6) 1270 #define LESENSE_CH1OUT_PA0 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x0) 1271 #define LESENSE_CH1OUT_PA1 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x1) 1272 #define LESENSE_CH1OUT_PA2 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x2) 1273 #define LESENSE_CH1OUT_PA3 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x3) 1274 #define LESENSE_CH1OUT_PA4 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x4) 1275 #define LESENSE_CH1OUT_PA5 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x5) 1276 #define LESENSE_CH1OUT_PA6 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x6) 1277 #define LESENSE_CH1OUT_PA7 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x7) 1278 #define LESENSE_CH1OUT_PA8 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x8) 1279 #define LESENSE_CH1OUT_PA9 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0x9) 1280 #define LESENSE_CH1OUT_PA10 SILABS_DBUS_LESENSE_CH1OUT(0x0, 0xa) 1281 #define LESENSE_CH1OUT_PB0 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x0) 1282 #define LESENSE_CH1OUT_PB1 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x1) 1283 #define LESENSE_CH1OUT_PB2 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x2) 1284 #define LESENSE_CH1OUT_PB3 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x3) 1285 #define LESENSE_CH1OUT_PB4 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x4) 1286 #define LESENSE_CH1OUT_PB5 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x5) 1287 #define LESENSE_CH1OUT_PB6 SILABS_DBUS_LESENSE_CH1OUT(0x1, 0x6) 1288 #define LESENSE_CH2OUT_PA0 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x0) 1289 #define LESENSE_CH2OUT_PA1 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x1) 1290 #define LESENSE_CH2OUT_PA2 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x2) 1291 #define LESENSE_CH2OUT_PA3 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x3) 1292 #define LESENSE_CH2OUT_PA4 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x4) 1293 #define LESENSE_CH2OUT_PA5 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x5) 1294 #define LESENSE_CH2OUT_PA6 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x6) 1295 #define LESENSE_CH2OUT_PA7 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x7) 1296 #define LESENSE_CH2OUT_PA8 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x8) 1297 #define LESENSE_CH2OUT_PA9 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0x9) 1298 #define LESENSE_CH2OUT_PA10 SILABS_DBUS_LESENSE_CH2OUT(0x0, 0xa) 1299 #define LESENSE_CH2OUT_PB0 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x0) 1300 #define LESENSE_CH2OUT_PB1 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x1) 1301 #define LESENSE_CH2OUT_PB2 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x2) 1302 #define LESENSE_CH2OUT_PB3 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x3) 1303 #define LESENSE_CH2OUT_PB4 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x4) 1304 #define LESENSE_CH2OUT_PB5 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x5) 1305 #define LESENSE_CH2OUT_PB6 SILABS_DBUS_LESENSE_CH2OUT(0x1, 0x6) 1306 #define LESENSE_CH3OUT_PA0 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x0) 1307 #define LESENSE_CH3OUT_PA1 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x1) 1308 #define LESENSE_CH3OUT_PA2 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x2) 1309 #define LESENSE_CH3OUT_PA3 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x3) 1310 #define LESENSE_CH3OUT_PA4 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x4) 1311 #define LESENSE_CH3OUT_PA5 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x5) 1312 #define LESENSE_CH3OUT_PA6 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x6) 1313 #define LESENSE_CH3OUT_PA7 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x7) 1314 #define LESENSE_CH3OUT_PA8 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x8) 1315 #define LESENSE_CH3OUT_PA9 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0x9) 1316 #define LESENSE_CH3OUT_PA10 SILABS_DBUS_LESENSE_CH3OUT(0x0, 0xa) 1317 #define LESENSE_CH3OUT_PB0 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x0) 1318 #define LESENSE_CH3OUT_PB1 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x1) 1319 #define LESENSE_CH3OUT_PB2 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x2) 1320 #define LESENSE_CH3OUT_PB3 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x3) 1321 #define LESENSE_CH3OUT_PB4 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x4) 1322 #define LESENSE_CH3OUT_PB5 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x5) 1323 #define LESENSE_CH3OUT_PB6 SILABS_DBUS_LESENSE_CH3OUT(0x1, 0x6) 1324 #define LESENSE_CH4OUT_PA0 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x0) 1325 #define LESENSE_CH4OUT_PA1 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x1) 1326 #define LESENSE_CH4OUT_PA2 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x2) 1327 #define LESENSE_CH4OUT_PA3 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x3) 1328 #define LESENSE_CH4OUT_PA4 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x4) 1329 #define LESENSE_CH4OUT_PA5 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x5) 1330 #define LESENSE_CH4OUT_PA6 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x6) 1331 #define LESENSE_CH4OUT_PA7 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x7) 1332 #define LESENSE_CH4OUT_PA8 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x8) 1333 #define LESENSE_CH4OUT_PA9 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0x9) 1334 #define LESENSE_CH4OUT_PA10 SILABS_DBUS_LESENSE_CH4OUT(0x0, 0xa) 1335 #define LESENSE_CH4OUT_PB0 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x0) 1336 #define LESENSE_CH4OUT_PB1 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x1) 1337 #define LESENSE_CH4OUT_PB2 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x2) 1338 #define LESENSE_CH4OUT_PB3 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x3) 1339 #define LESENSE_CH4OUT_PB4 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x4) 1340 #define LESENSE_CH4OUT_PB5 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x5) 1341 #define LESENSE_CH4OUT_PB6 SILABS_DBUS_LESENSE_CH4OUT(0x1, 0x6) 1342 #define LESENSE_CH5OUT_PA0 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x0) 1343 #define LESENSE_CH5OUT_PA1 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x1) 1344 #define LESENSE_CH5OUT_PA2 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x2) 1345 #define LESENSE_CH5OUT_PA3 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x3) 1346 #define LESENSE_CH5OUT_PA4 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x4) 1347 #define LESENSE_CH5OUT_PA5 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x5) 1348 #define LESENSE_CH5OUT_PA6 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x6) 1349 #define LESENSE_CH5OUT_PA7 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x7) 1350 #define LESENSE_CH5OUT_PA8 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x8) 1351 #define LESENSE_CH5OUT_PA9 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0x9) 1352 #define LESENSE_CH5OUT_PA10 SILABS_DBUS_LESENSE_CH5OUT(0x0, 0xa) 1353 #define LESENSE_CH5OUT_PB0 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x0) 1354 #define LESENSE_CH5OUT_PB1 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x1) 1355 #define LESENSE_CH5OUT_PB2 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x2) 1356 #define LESENSE_CH5OUT_PB3 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x3) 1357 #define LESENSE_CH5OUT_PB4 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x4) 1358 #define LESENSE_CH5OUT_PB5 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x5) 1359 #define LESENSE_CH5OUT_PB6 SILABS_DBUS_LESENSE_CH5OUT(0x1, 0x6) 1360 #define LESENSE_CH6OUT_PA0 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x0) 1361 #define LESENSE_CH6OUT_PA1 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x1) 1362 #define LESENSE_CH6OUT_PA2 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x2) 1363 #define LESENSE_CH6OUT_PA3 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x3) 1364 #define LESENSE_CH6OUT_PA4 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x4) 1365 #define LESENSE_CH6OUT_PA5 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x5) 1366 #define LESENSE_CH6OUT_PA6 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x6) 1367 #define LESENSE_CH6OUT_PA7 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x7) 1368 #define LESENSE_CH6OUT_PA8 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x8) 1369 #define LESENSE_CH6OUT_PA9 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0x9) 1370 #define LESENSE_CH6OUT_PA10 SILABS_DBUS_LESENSE_CH6OUT(0x0, 0xa) 1371 #define LESENSE_CH6OUT_PB0 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x0) 1372 #define LESENSE_CH6OUT_PB1 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x1) 1373 #define LESENSE_CH6OUT_PB2 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x2) 1374 #define LESENSE_CH6OUT_PB3 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x3) 1375 #define LESENSE_CH6OUT_PB4 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x4) 1376 #define LESENSE_CH6OUT_PB5 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x5) 1377 #define LESENSE_CH6OUT_PB6 SILABS_DBUS_LESENSE_CH6OUT(0x1, 0x6) 1378 #define LESENSE_CH7OUT_PA0 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x0) 1379 #define LESENSE_CH7OUT_PA1 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x1) 1380 #define LESENSE_CH7OUT_PA2 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x2) 1381 #define LESENSE_CH7OUT_PA3 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x3) 1382 #define LESENSE_CH7OUT_PA4 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x4) 1383 #define LESENSE_CH7OUT_PA5 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x5) 1384 #define LESENSE_CH7OUT_PA6 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x6) 1385 #define LESENSE_CH7OUT_PA7 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x7) 1386 #define LESENSE_CH7OUT_PA8 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x8) 1387 #define LESENSE_CH7OUT_PA9 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0x9) 1388 #define LESENSE_CH7OUT_PA10 SILABS_DBUS_LESENSE_CH7OUT(0x0, 0xa) 1389 #define LESENSE_CH7OUT_PB0 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x0) 1390 #define LESENSE_CH7OUT_PB1 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x1) 1391 #define LESENSE_CH7OUT_PB2 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x2) 1392 #define LESENSE_CH7OUT_PB3 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x3) 1393 #define LESENSE_CH7OUT_PB4 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x4) 1394 #define LESENSE_CH7OUT_PB5 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x5) 1395 #define LESENSE_CH7OUT_PB6 SILABS_DBUS_LESENSE_CH7OUT(0x1, 0x6) 1396 #define LESENSE_CH8OUT_PA0 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x0) 1397 #define LESENSE_CH8OUT_PA1 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x1) 1398 #define LESENSE_CH8OUT_PA2 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x2) 1399 #define LESENSE_CH8OUT_PA3 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x3) 1400 #define LESENSE_CH8OUT_PA4 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x4) 1401 #define LESENSE_CH8OUT_PA5 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x5) 1402 #define LESENSE_CH8OUT_PA6 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x6) 1403 #define LESENSE_CH8OUT_PA7 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x7) 1404 #define LESENSE_CH8OUT_PA8 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x8) 1405 #define LESENSE_CH8OUT_PA9 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0x9) 1406 #define LESENSE_CH8OUT_PA10 SILABS_DBUS_LESENSE_CH8OUT(0x0, 0xa) 1407 #define LESENSE_CH8OUT_PB0 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x0) 1408 #define LESENSE_CH8OUT_PB1 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x1) 1409 #define LESENSE_CH8OUT_PB2 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x2) 1410 #define LESENSE_CH8OUT_PB3 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x3) 1411 #define LESENSE_CH8OUT_PB4 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x4) 1412 #define LESENSE_CH8OUT_PB5 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x5) 1413 #define LESENSE_CH8OUT_PB6 SILABS_DBUS_LESENSE_CH8OUT(0x1, 0x6) 1414 #define LESENSE_CH9OUT_PA0 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x0) 1415 #define LESENSE_CH9OUT_PA1 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x1) 1416 #define LESENSE_CH9OUT_PA2 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x2) 1417 #define LESENSE_CH9OUT_PA3 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x3) 1418 #define LESENSE_CH9OUT_PA4 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x4) 1419 #define LESENSE_CH9OUT_PA5 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x5) 1420 #define LESENSE_CH9OUT_PA6 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x6) 1421 #define LESENSE_CH9OUT_PA7 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x7) 1422 #define LESENSE_CH9OUT_PA8 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x8) 1423 #define LESENSE_CH9OUT_PA9 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0x9) 1424 #define LESENSE_CH9OUT_PA10 SILABS_DBUS_LESENSE_CH9OUT(0x0, 0xa) 1425 #define LESENSE_CH9OUT_PB0 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x0) 1426 #define LESENSE_CH9OUT_PB1 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x1) 1427 #define LESENSE_CH9OUT_PB2 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x2) 1428 #define LESENSE_CH9OUT_PB3 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x3) 1429 #define LESENSE_CH9OUT_PB4 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x4) 1430 #define LESENSE_CH9OUT_PB5 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x5) 1431 #define LESENSE_CH9OUT_PB6 SILABS_DBUS_LESENSE_CH9OUT(0x1, 0x6) 1432 #define LESENSE_CH10OUT_PA0 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x0) 1433 #define LESENSE_CH10OUT_PA1 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x1) 1434 #define LESENSE_CH10OUT_PA2 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x2) 1435 #define LESENSE_CH10OUT_PA3 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x3) 1436 #define LESENSE_CH10OUT_PA4 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x4) 1437 #define LESENSE_CH10OUT_PA5 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x5) 1438 #define LESENSE_CH10OUT_PA6 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x6) 1439 #define LESENSE_CH10OUT_PA7 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x7) 1440 #define LESENSE_CH10OUT_PA8 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x8) 1441 #define LESENSE_CH10OUT_PA9 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0x9) 1442 #define LESENSE_CH10OUT_PA10 SILABS_DBUS_LESENSE_CH10OUT(0x0, 0xa) 1443 #define LESENSE_CH10OUT_PB0 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x0) 1444 #define LESENSE_CH10OUT_PB1 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x1) 1445 #define LESENSE_CH10OUT_PB2 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x2) 1446 #define LESENSE_CH10OUT_PB3 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x3) 1447 #define LESENSE_CH10OUT_PB4 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x4) 1448 #define LESENSE_CH10OUT_PB5 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x5) 1449 #define LESENSE_CH10OUT_PB6 SILABS_DBUS_LESENSE_CH10OUT(0x1, 0x6) 1450 #define LESENSE_CH11OUT_PA0 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x0) 1451 #define LESENSE_CH11OUT_PA1 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x1) 1452 #define LESENSE_CH11OUT_PA2 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x2) 1453 #define LESENSE_CH11OUT_PA3 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x3) 1454 #define LESENSE_CH11OUT_PA4 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x4) 1455 #define LESENSE_CH11OUT_PA5 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x5) 1456 #define LESENSE_CH11OUT_PA6 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x6) 1457 #define LESENSE_CH11OUT_PA7 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x7) 1458 #define LESENSE_CH11OUT_PA8 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x8) 1459 #define LESENSE_CH11OUT_PA9 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0x9) 1460 #define LESENSE_CH11OUT_PA10 SILABS_DBUS_LESENSE_CH11OUT(0x0, 0xa) 1461 #define LESENSE_CH11OUT_PB0 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x0) 1462 #define LESENSE_CH11OUT_PB1 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x1) 1463 #define LESENSE_CH11OUT_PB2 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x2) 1464 #define LESENSE_CH11OUT_PB3 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x3) 1465 #define LESENSE_CH11OUT_PB4 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x4) 1466 #define LESENSE_CH11OUT_PB5 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x5) 1467 #define LESENSE_CH11OUT_PB6 SILABS_DBUS_LESENSE_CH11OUT(0x1, 0x6) 1468 #define LESENSE_CH12OUT_PA0 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x0) 1469 #define LESENSE_CH12OUT_PA1 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x1) 1470 #define LESENSE_CH12OUT_PA2 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x2) 1471 #define LESENSE_CH12OUT_PA3 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x3) 1472 #define LESENSE_CH12OUT_PA4 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x4) 1473 #define LESENSE_CH12OUT_PA5 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x5) 1474 #define LESENSE_CH12OUT_PA6 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x6) 1475 #define LESENSE_CH12OUT_PA7 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x7) 1476 #define LESENSE_CH12OUT_PA8 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x8) 1477 #define LESENSE_CH12OUT_PA9 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0x9) 1478 #define LESENSE_CH12OUT_PA10 SILABS_DBUS_LESENSE_CH12OUT(0x0, 0xa) 1479 #define LESENSE_CH12OUT_PB0 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x0) 1480 #define LESENSE_CH12OUT_PB1 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x1) 1481 #define LESENSE_CH12OUT_PB2 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x2) 1482 #define LESENSE_CH12OUT_PB3 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x3) 1483 #define LESENSE_CH12OUT_PB4 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x4) 1484 #define LESENSE_CH12OUT_PB5 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x5) 1485 #define LESENSE_CH12OUT_PB6 SILABS_DBUS_LESENSE_CH12OUT(0x1, 0x6) 1486 #define LESENSE_CH13OUT_PA0 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x0) 1487 #define LESENSE_CH13OUT_PA1 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x1) 1488 #define LESENSE_CH13OUT_PA2 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x2) 1489 #define LESENSE_CH13OUT_PA3 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x3) 1490 #define LESENSE_CH13OUT_PA4 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x4) 1491 #define LESENSE_CH13OUT_PA5 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x5) 1492 #define LESENSE_CH13OUT_PA6 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x6) 1493 #define LESENSE_CH13OUT_PA7 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x7) 1494 #define LESENSE_CH13OUT_PA8 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x8) 1495 #define LESENSE_CH13OUT_PA9 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0x9) 1496 #define LESENSE_CH13OUT_PA10 SILABS_DBUS_LESENSE_CH13OUT(0x0, 0xa) 1497 #define LESENSE_CH13OUT_PB0 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x0) 1498 #define LESENSE_CH13OUT_PB1 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x1) 1499 #define LESENSE_CH13OUT_PB2 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x2) 1500 #define LESENSE_CH13OUT_PB3 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x3) 1501 #define LESENSE_CH13OUT_PB4 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x4) 1502 #define LESENSE_CH13OUT_PB5 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x5) 1503 #define LESENSE_CH13OUT_PB6 SILABS_DBUS_LESENSE_CH13OUT(0x1, 0x6) 1504 #define LESENSE_CH14OUT_PA0 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x0) 1505 #define LESENSE_CH14OUT_PA1 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x1) 1506 #define LESENSE_CH14OUT_PA2 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x2) 1507 #define LESENSE_CH14OUT_PA3 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x3) 1508 #define LESENSE_CH14OUT_PA4 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x4) 1509 #define LESENSE_CH14OUT_PA5 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x5) 1510 #define LESENSE_CH14OUT_PA6 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x6) 1511 #define LESENSE_CH14OUT_PA7 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x7) 1512 #define LESENSE_CH14OUT_PA8 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x8) 1513 #define LESENSE_CH14OUT_PA9 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0x9) 1514 #define LESENSE_CH14OUT_PA10 SILABS_DBUS_LESENSE_CH14OUT(0x0, 0xa) 1515 #define LESENSE_CH14OUT_PB0 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x0) 1516 #define LESENSE_CH14OUT_PB1 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x1) 1517 #define LESENSE_CH14OUT_PB2 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x2) 1518 #define LESENSE_CH14OUT_PB3 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x3) 1519 #define LESENSE_CH14OUT_PB4 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x4) 1520 #define LESENSE_CH14OUT_PB5 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x5) 1521 #define LESENSE_CH14OUT_PB6 SILABS_DBUS_LESENSE_CH14OUT(0x1, 0x6) 1522 #define LESENSE_CH15OUT_PA0 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x0) 1523 #define LESENSE_CH15OUT_PA1 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x1) 1524 #define LESENSE_CH15OUT_PA2 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x2) 1525 #define LESENSE_CH15OUT_PA3 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x3) 1526 #define LESENSE_CH15OUT_PA4 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x4) 1527 #define LESENSE_CH15OUT_PA5 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x5) 1528 #define LESENSE_CH15OUT_PA6 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x6) 1529 #define LESENSE_CH15OUT_PA7 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x7) 1530 #define LESENSE_CH15OUT_PA8 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x8) 1531 #define LESENSE_CH15OUT_PA9 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0x9) 1532 #define LESENSE_CH15OUT_PA10 SILABS_DBUS_LESENSE_CH15OUT(0x0, 0xa) 1533 #define LESENSE_CH15OUT_PB0 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x0) 1534 #define LESENSE_CH15OUT_PB1 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x1) 1535 #define LESENSE_CH15OUT_PB2 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x2) 1536 #define LESENSE_CH15OUT_PB3 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x3) 1537 #define LESENSE_CH15OUT_PB4 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x4) 1538 #define LESENSE_CH15OUT_PB5 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x5) 1539 #define LESENSE_CH15OUT_PB6 SILABS_DBUS_LESENSE_CH15OUT(0x1, 0x6) 1540 1541 #define LETIMER0_OUT0_PA0 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x0) 1542 #define LETIMER0_OUT0_PA1 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x1) 1543 #define LETIMER0_OUT0_PA2 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x2) 1544 #define LETIMER0_OUT0_PA3 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x3) 1545 #define LETIMER0_OUT0_PA4 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x4) 1546 #define LETIMER0_OUT0_PA5 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x5) 1547 #define LETIMER0_OUT0_PA6 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x6) 1548 #define LETIMER0_OUT0_PA7 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x7) 1549 #define LETIMER0_OUT0_PA8 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x8) 1550 #define LETIMER0_OUT0_PA9 SILABS_DBUS_LETIMER0_OUT0(0x0, 0x9) 1551 #define LETIMER0_OUT0_PA10 SILABS_DBUS_LETIMER0_OUT0(0x0, 0xa) 1552 #define LETIMER0_OUT0_PB0 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x0) 1553 #define LETIMER0_OUT0_PB1 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x1) 1554 #define LETIMER0_OUT0_PB2 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x2) 1555 #define LETIMER0_OUT0_PB3 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x3) 1556 #define LETIMER0_OUT0_PB4 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x4) 1557 #define LETIMER0_OUT0_PB5 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x5) 1558 #define LETIMER0_OUT0_PB6 SILABS_DBUS_LETIMER0_OUT0(0x1, 0x6) 1559 #define LETIMER0_OUT1_PA0 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x0) 1560 #define LETIMER0_OUT1_PA1 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x1) 1561 #define LETIMER0_OUT1_PA2 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x2) 1562 #define LETIMER0_OUT1_PA3 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x3) 1563 #define LETIMER0_OUT1_PA4 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x4) 1564 #define LETIMER0_OUT1_PA5 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x5) 1565 #define LETIMER0_OUT1_PA6 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x6) 1566 #define LETIMER0_OUT1_PA7 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x7) 1567 #define LETIMER0_OUT1_PA8 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x8) 1568 #define LETIMER0_OUT1_PA9 SILABS_DBUS_LETIMER0_OUT1(0x0, 0x9) 1569 #define LETIMER0_OUT1_PA10 SILABS_DBUS_LETIMER0_OUT1(0x0, 0xa) 1570 #define LETIMER0_OUT1_PB0 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x0) 1571 #define LETIMER0_OUT1_PB1 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x1) 1572 #define LETIMER0_OUT1_PB2 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x2) 1573 #define LETIMER0_OUT1_PB3 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x3) 1574 #define LETIMER0_OUT1_PB4 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x4) 1575 #define LETIMER0_OUT1_PB5 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x5) 1576 #define LETIMER0_OUT1_PB6 SILABS_DBUS_LETIMER0_OUT1(0x1, 0x6) 1577 1578 #define MODEM_ANT0_PA0 SILABS_DBUS_MODEM_ANT0(0x0, 0x0) 1579 #define MODEM_ANT0_PA1 SILABS_DBUS_MODEM_ANT0(0x0, 0x1) 1580 #define MODEM_ANT0_PA2 SILABS_DBUS_MODEM_ANT0(0x0, 0x2) 1581 #define MODEM_ANT0_PA3 SILABS_DBUS_MODEM_ANT0(0x0, 0x3) 1582 #define MODEM_ANT0_PA4 SILABS_DBUS_MODEM_ANT0(0x0, 0x4) 1583 #define MODEM_ANT0_PA5 SILABS_DBUS_MODEM_ANT0(0x0, 0x5) 1584 #define MODEM_ANT0_PA6 SILABS_DBUS_MODEM_ANT0(0x0, 0x6) 1585 #define MODEM_ANT0_PA7 SILABS_DBUS_MODEM_ANT0(0x0, 0x7) 1586 #define MODEM_ANT0_PA8 SILABS_DBUS_MODEM_ANT0(0x0, 0x8) 1587 #define MODEM_ANT0_PA9 SILABS_DBUS_MODEM_ANT0(0x0, 0x9) 1588 #define MODEM_ANT0_PA10 SILABS_DBUS_MODEM_ANT0(0x0, 0xa) 1589 #define MODEM_ANT0_PB0 SILABS_DBUS_MODEM_ANT0(0x1, 0x0) 1590 #define MODEM_ANT0_PB1 SILABS_DBUS_MODEM_ANT0(0x1, 0x1) 1591 #define MODEM_ANT0_PB2 SILABS_DBUS_MODEM_ANT0(0x1, 0x2) 1592 #define MODEM_ANT0_PB3 SILABS_DBUS_MODEM_ANT0(0x1, 0x3) 1593 #define MODEM_ANT0_PB4 SILABS_DBUS_MODEM_ANT0(0x1, 0x4) 1594 #define MODEM_ANT0_PB5 SILABS_DBUS_MODEM_ANT0(0x1, 0x5) 1595 #define MODEM_ANT0_PB6 SILABS_DBUS_MODEM_ANT0(0x1, 0x6) 1596 #define MODEM_ANT0_PC0 SILABS_DBUS_MODEM_ANT0(0x2, 0x0) 1597 #define MODEM_ANT0_PC1 SILABS_DBUS_MODEM_ANT0(0x2, 0x1) 1598 #define MODEM_ANT0_PC2 SILABS_DBUS_MODEM_ANT0(0x2, 0x2) 1599 #define MODEM_ANT0_PC3 SILABS_DBUS_MODEM_ANT0(0x2, 0x3) 1600 #define MODEM_ANT0_PC4 SILABS_DBUS_MODEM_ANT0(0x2, 0x4) 1601 #define MODEM_ANT0_PC5 SILABS_DBUS_MODEM_ANT0(0x2, 0x5) 1602 #define MODEM_ANT0_PC6 SILABS_DBUS_MODEM_ANT0(0x2, 0x6) 1603 #define MODEM_ANT0_PC7 SILABS_DBUS_MODEM_ANT0(0x2, 0x7) 1604 #define MODEM_ANT0_PC8 SILABS_DBUS_MODEM_ANT0(0x2, 0x8) 1605 #define MODEM_ANT0_PC9 SILABS_DBUS_MODEM_ANT0(0x2, 0x9) 1606 #define MODEM_ANT0_PD0 SILABS_DBUS_MODEM_ANT0(0x3, 0x0) 1607 #define MODEM_ANT0_PD1 SILABS_DBUS_MODEM_ANT0(0x3, 0x1) 1608 #define MODEM_ANT0_PD2 SILABS_DBUS_MODEM_ANT0(0x3, 0x2) 1609 #define MODEM_ANT0_PD3 SILABS_DBUS_MODEM_ANT0(0x3, 0x3) 1610 #define MODEM_ANT0_PD4 SILABS_DBUS_MODEM_ANT0(0x3, 0x4) 1611 #define MODEM_ANT0_PD5 SILABS_DBUS_MODEM_ANT0(0x3, 0x5) 1612 #define MODEM_ANT1_PA0 SILABS_DBUS_MODEM_ANT1(0x0, 0x0) 1613 #define MODEM_ANT1_PA1 SILABS_DBUS_MODEM_ANT1(0x0, 0x1) 1614 #define MODEM_ANT1_PA2 SILABS_DBUS_MODEM_ANT1(0x0, 0x2) 1615 #define MODEM_ANT1_PA3 SILABS_DBUS_MODEM_ANT1(0x0, 0x3) 1616 #define MODEM_ANT1_PA4 SILABS_DBUS_MODEM_ANT1(0x0, 0x4) 1617 #define MODEM_ANT1_PA5 SILABS_DBUS_MODEM_ANT1(0x0, 0x5) 1618 #define MODEM_ANT1_PA6 SILABS_DBUS_MODEM_ANT1(0x0, 0x6) 1619 #define MODEM_ANT1_PA7 SILABS_DBUS_MODEM_ANT1(0x0, 0x7) 1620 #define MODEM_ANT1_PA8 SILABS_DBUS_MODEM_ANT1(0x0, 0x8) 1621 #define MODEM_ANT1_PA9 SILABS_DBUS_MODEM_ANT1(0x0, 0x9) 1622 #define MODEM_ANT1_PA10 SILABS_DBUS_MODEM_ANT1(0x0, 0xa) 1623 #define MODEM_ANT1_PB0 SILABS_DBUS_MODEM_ANT1(0x1, 0x0) 1624 #define MODEM_ANT1_PB1 SILABS_DBUS_MODEM_ANT1(0x1, 0x1) 1625 #define MODEM_ANT1_PB2 SILABS_DBUS_MODEM_ANT1(0x1, 0x2) 1626 #define MODEM_ANT1_PB3 SILABS_DBUS_MODEM_ANT1(0x1, 0x3) 1627 #define MODEM_ANT1_PB4 SILABS_DBUS_MODEM_ANT1(0x1, 0x4) 1628 #define MODEM_ANT1_PB5 SILABS_DBUS_MODEM_ANT1(0x1, 0x5) 1629 #define MODEM_ANT1_PB6 SILABS_DBUS_MODEM_ANT1(0x1, 0x6) 1630 #define MODEM_ANT1_PC0 SILABS_DBUS_MODEM_ANT1(0x2, 0x0) 1631 #define MODEM_ANT1_PC1 SILABS_DBUS_MODEM_ANT1(0x2, 0x1) 1632 #define MODEM_ANT1_PC2 SILABS_DBUS_MODEM_ANT1(0x2, 0x2) 1633 #define MODEM_ANT1_PC3 SILABS_DBUS_MODEM_ANT1(0x2, 0x3) 1634 #define MODEM_ANT1_PC4 SILABS_DBUS_MODEM_ANT1(0x2, 0x4) 1635 #define MODEM_ANT1_PC5 SILABS_DBUS_MODEM_ANT1(0x2, 0x5) 1636 #define MODEM_ANT1_PC6 SILABS_DBUS_MODEM_ANT1(0x2, 0x6) 1637 #define MODEM_ANT1_PC7 SILABS_DBUS_MODEM_ANT1(0x2, 0x7) 1638 #define MODEM_ANT1_PC8 SILABS_DBUS_MODEM_ANT1(0x2, 0x8) 1639 #define MODEM_ANT1_PC9 SILABS_DBUS_MODEM_ANT1(0x2, 0x9) 1640 #define MODEM_ANT1_PD0 SILABS_DBUS_MODEM_ANT1(0x3, 0x0) 1641 #define MODEM_ANT1_PD1 SILABS_DBUS_MODEM_ANT1(0x3, 0x1) 1642 #define MODEM_ANT1_PD2 SILABS_DBUS_MODEM_ANT1(0x3, 0x2) 1643 #define MODEM_ANT1_PD3 SILABS_DBUS_MODEM_ANT1(0x3, 0x3) 1644 #define MODEM_ANT1_PD4 SILABS_DBUS_MODEM_ANT1(0x3, 0x4) 1645 #define MODEM_ANT1_PD5 SILABS_DBUS_MODEM_ANT1(0x3, 0x5) 1646 #define MODEM_ANTROLLOVER_PC0 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x0) 1647 #define MODEM_ANTROLLOVER_PC1 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x1) 1648 #define MODEM_ANTROLLOVER_PC2 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x2) 1649 #define MODEM_ANTROLLOVER_PC3 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x3) 1650 #define MODEM_ANTROLLOVER_PC4 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x4) 1651 #define MODEM_ANTROLLOVER_PC5 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x5) 1652 #define MODEM_ANTROLLOVER_PC6 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x6) 1653 #define MODEM_ANTROLLOVER_PC7 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x7) 1654 #define MODEM_ANTROLLOVER_PC8 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x8) 1655 #define MODEM_ANTROLLOVER_PC9 SILABS_DBUS_MODEM_ANTROLLOVER(0x2, 0x9) 1656 #define MODEM_ANTROLLOVER_PD0 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x0) 1657 #define MODEM_ANTROLLOVER_PD1 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x1) 1658 #define MODEM_ANTROLLOVER_PD2 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x2) 1659 #define MODEM_ANTROLLOVER_PD3 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x3) 1660 #define MODEM_ANTROLLOVER_PD4 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x4) 1661 #define MODEM_ANTROLLOVER_PD5 SILABS_DBUS_MODEM_ANTROLLOVER(0x3, 0x5) 1662 #define MODEM_ANTRR0_PC0 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x0) 1663 #define MODEM_ANTRR0_PC1 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x1) 1664 #define MODEM_ANTRR0_PC2 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x2) 1665 #define MODEM_ANTRR0_PC3 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x3) 1666 #define MODEM_ANTRR0_PC4 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x4) 1667 #define MODEM_ANTRR0_PC5 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x5) 1668 #define MODEM_ANTRR0_PC6 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x6) 1669 #define MODEM_ANTRR0_PC7 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x7) 1670 #define MODEM_ANTRR0_PC8 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x8) 1671 #define MODEM_ANTRR0_PC9 SILABS_DBUS_MODEM_ANTRR0(0x2, 0x9) 1672 #define MODEM_ANTRR0_PD0 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x0) 1673 #define MODEM_ANTRR0_PD1 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x1) 1674 #define MODEM_ANTRR0_PD2 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x2) 1675 #define MODEM_ANTRR0_PD3 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x3) 1676 #define MODEM_ANTRR0_PD4 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x4) 1677 #define MODEM_ANTRR0_PD5 SILABS_DBUS_MODEM_ANTRR0(0x3, 0x5) 1678 #define MODEM_ANTRR1_PC0 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x0) 1679 #define MODEM_ANTRR1_PC1 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x1) 1680 #define MODEM_ANTRR1_PC2 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x2) 1681 #define MODEM_ANTRR1_PC3 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x3) 1682 #define MODEM_ANTRR1_PC4 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x4) 1683 #define MODEM_ANTRR1_PC5 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x5) 1684 #define MODEM_ANTRR1_PC6 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x6) 1685 #define MODEM_ANTRR1_PC7 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x7) 1686 #define MODEM_ANTRR1_PC8 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x8) 1687 #define MODEM_ANTRR1_PC9 SILABS_DBUS_MODEM_ANTRR1(0x2, 0x9) 1688 #define MODEM_ANTRR1_PD0 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x0) 1689 #define MODEM_ANTRR1_PD1 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x1) 1690 #define MODEM_ANTRR1_PD2 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x2) 1691 #define MODEM_ANTRR1_PD3 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x3) 1692 #define MODEM_ANTRR1_PD4 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x4) 1693 #define MODEM_ANTRR1_PD5 SILABS_DBUS_MODEM_ANTRR1(0x3, 0x5) 1694 #define MODEM_ANTRR2_PC0 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x0) 1695 #define MODEM_ANTRR2_PC1 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x1) 1696 #define MODEM_ANTRR2_PC2 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x2) 1697 #define MODEM_ANTRR2_PC3 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x3) 1698 #define MODEM_ANTRR2_PC4 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x4) 1699 #define MODEM_ANTRR2_PC5 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x5) 1700 #define MODEM_ANTRR2_PC6 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x6) 1701 #define MODEM_ANTRR2_PC7 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x7) 1702 #define MODEM_ANTRR2_PC8 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x8) 1703 #define MODEM_ANTRR2_PC9 SILABS_DBUS_MODEM_ANTRR2(0x2, 0x9) 1704 #define MODEM_ANTRR2_PD0 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x0) 1705 #define MODEM_ANTRR2_PD1 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x1) 1706 #define MODEM_ANTRR2_PD2 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x2) 1707 #define MODEM_ANTRR2_PD3 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x3) 1708 #define MODEM_ANTRR2_PD4 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x4) 1709 #define MODEM_ANTRR2_PD5 SILABS_DBUS_MODEM_ANTRR2(0x3, 0x5) 1710 #define MODEM_ANTRR3_PC0 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x0) 1711 #define MODEM_ANTRR3_PC1 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x1) 1712 #define MODEM_ANTRR3_PC2 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x2) 1713 #define MODEM_ANTRR3_PC3 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x3) 1714 #define MODEM_ANTRR3_PC4 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x4) 1715 #define MODEM_ANTRR3_PC5 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x5) 1716 #define MODEM_ANTRR3_PC6 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x6) 1717 #define MODEM_ANTRR3_PC7 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x7) 1718 #define MODEM_ANTRR3_PC8 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x8) 1719 #define MODEM_ANTRR3_PC9 SILABS_DBUS_MODEM_ANTRR3(0x2, 0x9) 1720 #define MODEM_ANTRR3_PD0 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x0) 1721 #define MODEM_ANTRR3_PD1 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x1) 1722 #define MODEM_ANTRR3_PD2 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x2) 1723 #define MODEM_ANTRR3_PD3 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x3) 1724 #define MODEM_ANTRR3_PD4 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x4) 1725 #define MODEM_ANTRR3_PD5 SILABS_DBUS_MODEM_ANTRR3(0x3, 0x5) 1726 #define MODEM_ANTRR4_PC0 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x0) 1727 #define MODEM_ANTRR4_PC1 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x1) 1728 #define MODEM_ANTRR4_PC2 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x2) 1729 #define MODEM_ANTRR4_PC3 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x3) 1730 #define MODEM_ANTRR4_PC4 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x4) 1731 #define MODEM_ANTRR4_PC5 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x5) 1732 #define MODEM_ANTRR4_PC6 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x6) 1733 #define MODEM_ANTRR4_PC7 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x7) 1734 #define MODEM_ANTRR4_PC8 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x8) 1735 #define MODEM_ANTRR4_PC9 SILABS_DBUS_MODEM_ANTRR4(0x2, 0x9) 1736 #define MODEM_ANTRR4_PD0 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x0) 1737 #define MODEM_ANTRR4_PD1 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x1) 1738 #define MODEM_ANTRR4_PD2 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x2) 1739 #define MODEM_ANTRR4_PD3 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x3) 1740 #define MODEM_ANTRR4_PD4 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x4) 1741 #define MODEM_ANTRR4_PD5 SILABS_DBUS_MODEM_ANTRR4(0x3, 0x5) 1742 #define MODEM_ANTRR5_PC0 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x0) 1743 #define MODEM_ANTRR5_PC1 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x1) 1744 #define MODEM_ANTRR5_PC2 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x2) 1745 #define MODEM_ANTRR5_PC3 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x3) 1746 #define MODEM_ANTRR5_PC4 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x4) 1747 #define MODEM_ANTRR5_PC5 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x5) 1748 #define MODEM_ANTRR5_PC6 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x6) 1749 #define MODEM_ANTRR5_PC7 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x7) 1750 #define MODEM_ANTRR5_PC8 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x8) 1751 #define MODEM_ANTRR5_PC9 SILABS_DBUS_MODEM_ANTRR5(0x2, 0x9) 1752 #define MODEM_ANTRR5_PD0 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x0) 1753 #define MODEM_ANTRR5_PD1 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x1) 1754 #define MODEM_ANTRR5_PD2 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x2) 1755 #define MODEM_ANTRR5_PD3 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x3) 1756 #define MODEM_ANTRR5_PD4 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x4) 1757 #define MODEM_ANTRR5_PD5 SILABS_DBUS_MODEM_ANTRR5(0x3, 0x5) 1758 #define MODEM_ANTSWEN_PC0 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x0) 1759 #define MODEM_ANTSWEN_PC1 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x1) 1760 #define MODEM_ANTSWEN_PC2 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x2) 1761 #define MODEM_ANTSWEN_PC3 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x3) 1762 #define MODEM_ANTSWEN_PC4 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x4) 1763 #define MODEM_ANTSWEN_PC5 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x5) 1764 #define MODEM_ANTSWEN_PC6 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x6) 1765 #define MODEM_ANTSWEN_PC7 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x7) 1766 #define MODEM_ANTSWEN_PC8 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x8) 1767 #define MODEM_ANTSWEN_PC9 SILABS_DBUS_MODEM_ANTSWEN(0x2, 0x9) 1768 #define MODEM_ANTSWEN_PD0 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x0) 1769 #define MODEM_ANTSWEN_PD1 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x1) 1770 #define MODEM_ANTSWEN_PD2 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x2) 1771 #define MODEM_ANTSWEN_PD3 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x3) 1772 #define MODEM_ANTSWEN_PD4 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x4) 1773 #define MODEM_ANTSWEN_PD5 SILABS_DBUS_MODEM_ANTSWEN(0x3, 0x5) 1774 #define MODEM_ANTSWUS_PC0 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x0) 1775 #define MODEM_ANTSWUS_PC1 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x1) 1776 #define MODEM_ANTSWUS_PC2 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x2) 1777 #define MODEM_ANTSWUS_PC3 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x3) 1778 #define MODEM_ANTSWUS_PC4 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x4) 1779 #define MODEM_ANTSWUS_PC5 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x5) 1780 #define MODEM_ANTSWUS_PC6 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x6) 1781 #define MODEM_ANTSWUS_PC7 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x7) 1782 #define MODEM_ANTSWUS_PC8 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x8) 1783 #define MODEM_ANTSWUS_PC9 SILABS_DBUS_MODEM_ANTSWUS(0x2, 0x9) 1784 #define MODEM_ANTSWUS_PD0 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x0) 1785 #define MODEM_ANTSWUS_PD1 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x1) 1786 #define MODEM_ANTSWUS_PD2 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x2) 1787 #define MODEM_ANTSWUS_PD3 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x3) 1788 #define MODEM_ANTSWUS_PD4 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x4) 1789 #define MODEM_ANTSWUS_PD5 SILABS_DBUS_MODEM_ANTSWUS(0x3, 0x5) 1790 #define MODEM_ANTTRIG_PC0 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x0) 1791 #define MODEM_ANTTRIG_PC1 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x1) 1792 #define MODEM_ANTTRIG_PC2 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x2) 1793 #define MODEM_ANTTRIG_PC3 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x3) 1794 #define MODEM_ANTTRIG_PC4 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x4) 1795 #define MODEM_ANTTRIG_PC5 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x5) 1796 #define MODEM_ANTTRIG_PC6 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x6) 1797 #define MODEM_ANTTRIG_PC7 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x7) 1798 #define MODEM_ANTTRIG_PC8 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x8) 1799 #define MODEM_ANTTRIG_PC9 SILABS_DBUS_MODEM_ANTTRIG(0x2, 0x9) 1800 #define MODEM_ANTTRIG_PD0 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x0) 1801 #define MODEM_ANTTRIG_PD1 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x1) 1802 #define MODEM_ANTTRIG_PD2 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x2) 1803 #define MODEM_ANTTRIG_PD3 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x3) 1804 #define MODEM_ANTTRIG_PD4 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x4) 1805 #define MODEM_ANTTRIG_PD5 SILABS_DBUS_MODEM_ANTTRIG(0x3, 0x5) 1806 #define MODEM_ANTTRIGSTOP_PC0 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x0) 1807 #define MODEM_ANTTRIGSTOP_PC1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x1) 1808 #define MODEM_ANTTRIGSTOP_PC2 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x2) 1809 #define MODEM_ANTTRIGSTOP_PC3 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x3) 1810 #define MODEM_ANTTRIGSTOP_PC4 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x4) 1811 #define MODEM_ANTTRIGSTOP_PC5 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x5) 1812 #define MODEM_ANTTRIGSTOP_PC6 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x6) 1813 #define MODEM_ANTTRIGSTOP_PC7 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x7) 1814 #define MODEM_ANTTRIGSTOP_PC8 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x8) 1815 #define MODEM_ANTTRIGSTOP_PC9 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x2, 0x9) 1816 #define MODEM_ANTTRIGSTOP_PD0 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x0) 1817 #define MODEM_ANTTRIGSTOP_PD1 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x1) 1818 #define MODEM_ANTTRIGSTOP_PD2 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x2) 1819 #define MODEM_ANTTRIGSTOP_PD3 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x3) 1820 #define MODEM_ANTTRIGSTOP_PD4 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x4) 1821 #define MODEM_ANTTRIGSTOP_PD5 SILABS_DBUS_MODEM_ANTTRIGSTOP(0x3, 0x5) 1822 #define MODEM_DCLK_PA0 SILABS_DBUS_MODEM_DCLK(0x0, 0x0) 1823 #define MODEM_DCLK_PA1 SILABS_DBUS_MODEM_DCLK(0x0, 0x1) 1824 #define MODEM_DCLK_PA2 SILABS_DBUS_MODEM_DCLK(0x0, 0x2) 1825 #define MODEM_DCLK_PA3 SILABS_DBUS_MODEM_DCLK(0x0, 0x3) 1826 #define MODEM_DCLK_PA4 SILABS_DBUS_MODEM_DCLK(0x0, 0x4) 1827 #define MODEM_DCLK_PA5 SILABS_DBUS_MODEM_DCLK(0x0, 0x5) 1828 #define MODEM_DCLK_PA6 SILABS_DBUS_MODEM_DCLK(0x0, 0x6) 1829 #define MODEM_DCLK_PA7 SILABS_DBUS_MODEM_DCLK(0x0, 0x7) 1830 #define MODEM_DCLK_PA8 SILABS_DBUS_MODEM_DCLK(0x0, 0x8) 1831 #define MODEM_DCLK_PA9 SILABS_DBUS_MODEM_DCLK(0x0, 0x9) 1832 #define MODEM_DCLK_PA10 SILABS_DBUS_MODEM_DCLK(0x0, 0xa) 1833 #define MODEM_DCLK_PB0 SILABS_DBUS_MODEM_DCLK(0x1, 0x0) 1834 #define MODEM_DCLK_PB1 SILABS_DBUS_MODEM_DCLK(0x1, 0x1) 1835 #define MODEM_DCLK_PB2 SILABS_DBUS_MODEM_DCLK(0x1, 0x2) 1836 #define MODEM_DCLK_PB3 SILABS_DBUS_MODEM_DCLK(0x1, 0x3) 1837 #define MODEM_DCLK_PB4 SILABS_DBUS_MODEM_DCLK(0x1, 0x4) 1838 #define MODEM_DCLK_PB5 SILABS_DBUS_MODEM_DCLK(0x1, 0x5) 1839 #define MODEM_DCLK_PB6 SILABS_DBUS_MODEM_DCLK(0x1, 0x6) 1840 #define MODEM_DOUT_PA0 SILABS_DBUS_MODEM_DOUT(0x0, 0x0) 1841 #define MODEM_DOUT_PA1 SILABS_DBUS_MODEM_DOUT(0x0, 0x1) 1842 #define MODEM_DOUT_PA2 SILABS_DBUS_MODEM_DOUT(0x0, 0x2) 1843 #define MODEM_DOUT_PA3 SILABS_DBUS_MODEM_DOUT(0x0, 0x3) 1844 #define MODEM_DOUT_PA4 SILABS_DBUS_MODEM_DOUT(0x0, 0x4) 1845 #define MODEM_DOUT_PA5 SILABS_DBUS_MODEM_DOUT(0x0, 0x5) 1846 #define MODEM_DOUT_PA6 SILABS_DBUS_MODEM_DOUT(0x0, 0x6) 1847 #define MODEM_DOUT_PA7 SILABS_DBUS_MODEM_DOUT(0x0, 0x7) 1848 #define MODEM_DOUT_PA8 SILABS_DBUS_MODEM_DOUT(0x0, 0x8) 1849 #define MODEM_DOUT_PA9 SILABS_DBUS_MODEM_DOUT(0x0, 0x9) 1850 #define MODEM_DOUT_PA10 SILABS_DBUS_MODEM_DOUT(0x0, 0xa) 1851 #define MODEM_DOUT_PB0 SILABS_DBUS_MODEM_DOUT(0x1, 0x0) 1852 #define MODEM_DOUT_PB1 SILABS_DBUS_MODEM_DOUT(0x1, 0x1) 1853 #define MODEM_DOUT_PB2 SILABS_DBUS_MODEM_DOUT(0x1, 0x2) 1854 #define MODEM_DOUT_PB3 SILABS_DBUS_MODEM_DOUT(0x1, 0x3) 1855 #define MODEM_DOUT_PB4 SILABS_DBUS_MODEM_DOUT(0x1, 0x4) 1856 #define MODEM_DOUT_PB5 SILABS_DBUS_MODEM_DOUT(0x1, 0x5) 1857 #define MODEM_DOUT_PB6 SILABS_DBUS_MODEM_DOUT(0x1, 0x6) 1858 #define MODEM_DIN_PA0 SILABS_DBUS_MODEM_DIN(0x0, 0x0) 1859 #define MODEM_DIN_PA1 SILABS_DBUS_MODEM_DIN(0x0, 0x1) 1860 #define MODEM_DIN_PA2 SILABS_DBUS_MODEM_DIN(0x0, 0x2) 1861 #define MODEM_DIN_PA3 SILABS_DBUS_MODEM_DIN(0x0, 0x3) 1862 #define MODEM_DIN_PA4 SILABS_DBUS_MODEM_DIN(0x0, 0x4) 1863 #define MODEM_DIN_PA5 SILABS_DBUS_MODEM_DIN(0x0, 0x5) 1864 #define MODEM_DIN_PA6 SILABS_DBUS_MODEM_DIN(0x0, 0x6) 1865 #define MODEM_DIN_PA7 SILABS_DBUS_MODEM_DIN(0x0, 0x7) 1866 #define MODEM_DIN_PA8 SILABS_DBUS_MODEM_DIN(0x0, 0x8) 1867 #define MODEM_DIN_PA9 SILABS_DBUS_MODEM_DIN(0x0, 0x9) 1868 #define MODEM_DIN_PA10 SILABS_DBUS_MODEM_DIN(0x0, 0xa) 1869 #define MODEM_DIN_PB0 SILABS_DBUS_MODEM_DIN(0x1, 0x0) 1870 #define MODEM_DIN_PB1 SILABS_DBUS_MODEM_DIN(0x1, 0x1) 1871 #define MODEM_DIN_PB2 SILABS_DBUS_MODEM_DIN(0x1, 0x2) 1872 #define MODEM_DIN_PB3 SILABS_DBUS_MODEM_DIN(0x1, 0x3) 1873 #define MODEM_DIN_PB4 SILABS_DBUS_MODEM_DIN(0x1, 0x4) 1874 #define MODEM_DIN_PB5 SILABS_DBUS_MODEM_DIN(0x1, 0x5) 1875 #define MODEM_DIN_PB6 SILABS_DBUS_MODEM_DIN(0x1, 0x6) 1876 1877 #define PCNT0_S0IN_PA0 SILABS_DBUS_PCNT0_S0IN(0x0, 0x0) 1878 #define PCNT0_S0IN_PA1 SILABS_DBUS_PCNT0_S0IN(0x0, 0x1) 1879 #define PCNT0_S0IN_PA2 SILABS_DBUS_PCNT0_S0IN(0x0, 0x2) 1880 #define PCNT0_S0IN_PA3 SILABS_DBUS_PCNT0_S0IN(0x0, 0x3) 1881 #define PCNT0_S0IN_PA4 SILABS_DBUS_PCNT0_S0IN(0x0, 0x4) 1882 #define PCNT0_S0IN_PA5 SILABS_DBUS_PCNT0_S0IN(0x0, 0x5) 1883 #define PCNT0_S0IN_PA6 SILABS_DBUS_PCNT0_S0IN(0x0, 0x6) 1884 #define PCNT0_S0IN_PA7 SILABS_DBUS_PCNT0_S0IN(0x0, 0x7) 1885 #define PCNT0_S0IN_PA8 SILABS_DBUS_PCNT0_S0IN(0x0, 0x8) 1886 #define PCNT0_S0IN_PA9 SILABS_DBUS_PCNT0_S0IN(0x0, 0x9) 1887 #define PCNT0_S0IN_PA10 SILABS_DBUS_PCNT0_S0IN(0x0, 0xa) 1888 #define PCNT0_S0IN_PB0 SILABS_DBUS_PCNT0_S0IN(0x1, 0x0) 1889 #define PCNT0_S0IN_PB1 SILABS_DBUS_PCNT0_S0IN(0x1, 0x1) 1890 #define PCNT0_S0IN_PB2 SILABS_DBUS_PCNT0_S0IN(0x1, 0x2) 1891 #define PCNT0_S0IN_PB3 SILABS_DBUS_PCNT0_S0IN(0x1, 0x3) 1892 #define PCNT0_S0IN_PB4 SILABS_DBUS_PCNT0_S0IN(0x1, 0x4) 1893 #define PCNT0_S0IN_PB5 SILABS_DBUS_PCNT0_S0IN(0x1, 0x5) 1894 #define PCNT0_S0IN_PB6 SILABS_DBUS_PCNT0_S0IN(0x1, 0x6) 1895 #define PCNT0_S1IN_PA0 SILABS_DBUS_PCNT0_S1IN(0x0, 0x0) 1896 #define PCNT0_S1IN_PA1 SILABS_DBUS_PCNT0_S1IN(0x0, 0x1) 1897 #define PCNT0_S1IN_PA2 SILABS_DBUS_PCNT0_S1IN(0x0, 0x2) 1898 #define PCNT0_S1IN_PA3 SILABS_DBUS_PCNT0_S1IN(0x0, 0x3) 1899 #define PCNT0_S1IN_PA4 SILABS_DBUS_PCNT0_S1IN(0x0, 0x4) 1900 #define PCNT0_S1IN_PA5 SILABS_DBUS_PCNT0_S1IN(0x0, 0x5) 1901 #define PCNT0_S1IN_PA6 SILABS_DBUS_PCNT0_S1IN(0x0, 0x6) 1902 #define PCNT0_S1IN_PA7 SILABS_DBUS_PCNT0_S1IN(0x0, 0x7) 1903 #define PCNT0_S1IN_PA8 SILABS_DBUS_PCNT0_S1IN(0x0, 0x8) 1904 #define PCNT0_S1IN_PA9 SILABS_DBUS_PCNT0_S1IN(0x0, 0x9) 1905 #define PCNT0_S1IN_PA10 SILABS_DBUS_PCNT0_S1IN(0x0, 0xa) 1906 #define PCNT0_S1IN_PB0 SILABS_DBUS_PCNT0_S1IN(0x1, 0x0) 1907 #define PCNT0_S1IN_PB1 SILABS_DBUS_PCNT0_S1IN(0x1, 0x1) 1908 #define PCNT0_S1IN_PB2 SILABS_DBUS_PCNT0_S1IN(0x1, 0x2) 1909 #define PCNT0_S1IN_PB3 SILABS_DBUS_PCNT0_S1IN(0x1, 0x3) 1910 #define PCNT0_S1IN_PB4 SILABS_DBUS_PCNT0_S1IN(0x1, 0x4) 1911 #define PCNT0_S1IN_PB5 SILABS_DBUS_PCNT0_S1IN(0x1, 0x5) 1912 #define PCNT0_S1IN_PB6 SILABS_DBUS_PCNT0_S1IN(0x1, 0x6) 1913 1914 #define PRS0_ASYNCH0_PA0 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x0) 1915 #define PRS0_ASYNCH0_PA1 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x1) 1916 #define PRS0_ASYNCH0_PA2 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x2) 1917 #define PRS0_ASYNCH0_PA3 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x3) 1918 #define PRS0_ASYNCH0_PA4 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x4) 1919 #define PRS0_ASYNCH0_PA5 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x5) 1920 #define PRS0_ASYNCH0_PA6 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x6) 1921 #define PRS0_ASYNCH0_PA7 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x7) 1922 #define PRS0_ASYNCH0_PA8 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x8) 1923 #define PRS0_ASYNCH0_PA9 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0x9) 1924 #define PRS0_ASYNCH0_PA10 SILABS_DBUS_PRS0_ASYNCH0(0x0, 0xa) 1925 #define PRS0_ASYNCH0_PB0 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x0) 1926 #define PRS0_ASYNCH0_PB1 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x1) 1927 #define PRS0_ASYNCH0_PB2 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x2) 1928 #define PRS0_ASYNCH0_PB3 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x3) 1929 #define PRS0_ASYNCH0_PB4 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x4) 1930 #define PRS0_ASYNCH0_PB5 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x5) 1931 #define PRS0_ASYNCH0_PB6 SILABS_DBUS_PRS0_ASYNCH0(0x1, 0x6) 1932 #define PRS0_ASYNCH1_PA0 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x0) 1933 #define PRS0_ASYNCH1_PA1 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x1) 1934 #define PRS0_ASYNCH1_PA2 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x2) 1935 #define PRS0_ASYNCH1_PA3 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x3) 1936 #define PRS0_ASYNCH1_PA4 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x4) 1937 #define PRS0_ASYNCH1_PA5 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x5) 1938 #define PRS0_ASYNCH1_PA6 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x6) 1939 #define PRS0_ASYNCH1_PA7 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x7) 1940 #define PRS0_ASYNCH1_PA8 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x8) 1941 #define PRS0_ASYNCH1_PA9 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0x9) 1942 #define PRS0_ASYNCH1_PA10 SILABS_DBUS_PRS0_ASYNCH1(0x0, 0xa) 1943 #define PRS0_ASYNCH1_PB0 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x0) 1944 #define PRS0_ASYNCH1_PB1 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x1) 1945 #define PRS0_ASYNCH1_PB2 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x2) 1946 #define PRS0_ASYNCH1_PB3 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x3) 1947 #define PRS0_ASYNCH1_PB4 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x4) 1948 #define PRS0_ASYNCH1_PB5 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x5) 1949 #define PRS0_ASYNCH1_PB6 SILABS_DBUS_PRS0_ASYNCH1(0x1, 0x6) 1950 #define PRS0_ASYNCH2_PA0 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x0) 1951 #define PRS0_ASYNCH2_PA1 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x1) 1952 #define PRS0_ASYNCH2_PA2 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x2) 1953 #define PRS0_ASYNCH2_PA3 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x3) 1954 #define PRS0_ASYNCH2_PA4 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x4) 1955 #define PRS0_ASYNCH2_PA5 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x5) 1956 #define PRS0_ASYNCH2_PA6 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x6) 1957 #define PRS0_ASYNCH2_PA7 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x7) 1958 #define PRS0_ASYNCH2_PA8 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x8) 1959 #define PRS0_ASYNCH2_PA9 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0x9) 1960 #define PRS0_ASYNCH2_PA10 SILABS_DBUS_PRS0_ASYNCH2(0x0, 0xa) 1961 #define PRS0_ASYNCH2_PB0 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x0) 1962 #define PRS0_ASYNCH2_PB1 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x1) 1963 #define PRS0_ASYNCH2_PB2 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x2) 1964 #define PRS0_ASYNCH2_PB3 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x3) 1965 #define PRS0_ASYNCH2_PB4 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x4) 1966 #define PRS0_ASYNCH2_PB5 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x5) 1967 #define PRS0_ASYNCH2_PB6 SILABS_DBUS_PRS0_ASYNCH2(0x1, 0x6) 1968 #define PRS0_ASYNCH3_PA0 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x0) 1969 #define PRS0_ASYNCH3_PA1 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x1) 1970 #define PRS0_ASYNCH3_PA2 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x2) 1971 #define PRS0_ASYNCH3_PA3 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x3) 1972 #define PRS0_ASYNCH3_PA4 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x4) 1973 #define PRS0_ASYNCH3_PA5 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x5) 1974 #define PRS0_ASYNCH3_PA6 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x6) 1975 #define PRS0_ASYNCH3_PA7 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x7) 1976 #define PRS0_ASYNCH3_PA8 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x8) 1977 #define PRS0_ASYNCH3_PA9 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0x9) 1978 #define PRS0_ASYNCH3_PA10 SILABS_DBUS_PRS0_ASYNCH3(0x0, 0xa) 1979 #define PRS0_ASYNCH3_PB0 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x0) 1980 #define PRS0_ASYNCH3_PB1 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x1) 1981 #define PRS0_ASYNCH3_PB2 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x2) 1982 #define PRS0_ASYNCH3_PB3 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x3) 1983 #define PRS0_ASYNCH3_PB4 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x4) 1984 #define PRS0_ASYNCH3_PB5 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x5) 1985 #define PRS0_ASYNCH3_PB6 SILABS_DBUS_PRS0_ASYNCH3(0x1, 0x6) 1986 #define PRS0_ASYNCH4_PA0 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x0) 1987 #define PRS0_ASYNCH4_PA1 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x1) 1988 #define PRS0_ASYNCH4_PA2 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x2) 1989 #define PRS0_ASYNCH4_PA3 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x3) 1990 #define PRS0_ASYNCH4_PA4 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x4) 1991 #define PRS0_ASYNCH4_PA5 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x5) 1992 #define PRS0_ASYNCH4_PA6 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x6) 1993 #define PRS0_ASYNCH4_PA7 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x7) 1994 #define PRS0_ASYNCH4_PA8 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x8) 1995 #define PRS0_ASYNCH4_PA9 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0x9) 1996 #define PRS0_ASYNCH4_PA10 SILABS_DBUS_PRS0_ASYNCH4(0x0, 0xa) 1997 #define PRS0_ASYNCH4_PB0 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x0) 1998 #define PRS0_ASYNCH4_PB1 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x1) 1999 #define PRS0_ASYNCH4_PB2 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x2) 2000 #define PRS0_ASYNCH4_PB3 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x3) 2001 #define PRS0_ASYNCH4_PB4 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x4) 2002 #define PRS0_ASYNCH4_PB5 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x5) 2003 #define PRS0_ASYNCH4_PB6 SILABS_DBUS_PRS0_ASYNCH4(0x1, 0x6) 2004 #define PRS0_ASYNCH5_PA0 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x0) 2005 #define PRS0_ASYNCH5_PA1 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x1) 2006 #define PRS0_ASYNCH5_PA2 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x2) 2007 #define PRS0_ASYNCH5_PA3 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x3) 2008 #define PRS0_ASYNCH5_PA4 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x4) 2009 #define PRS0_ASYNCH5_PA5 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x5) 2010 #define PRS0_ASYNCH5_PA6 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x6) 2011 #define PRS0_ASYNCH5_PA7 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x7) 2012 #define PRS0_ASYNCH5_PA8 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x8) 2013 #define PRS0_ASYNCH5_PA9 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0x9) 2014 #define PRS0_ASYNCH5_PA10 SILABS_DBUS_PRS0_ASYNCH5(0x0, 0xa) 2015 #define PRS0_ASYNCH5_PB0 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x0) 2016 #define PRS0_ASYNCH5_PB1 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x1) 2017 #define PRS0_ASYNCH5_PB2 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x2) 2018 #define PRS0_ASYNCH5_PB3 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x3) 2019 #define PRS0_ASYNCH5_PB4 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x4) 2020 #define PRS0_ASYNCH5_PB5 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x5) 2021 #define PRS0_ASYNCH5_PB6 SILABS_DBUS_PRS0_ASYNCH5(0x1, 0x6) 2022 #define PRS0_ASYNCH6_PC0 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x0) 2023 #define PRS0_ASYNCH6_PC1 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x1) 2024 #define PRS0_ASYNCH6_PC2 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x2) 2025 #define PRS0_ASYNCH6_PC3 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x3) 2026 #define PRS0_ASYNCH6_PC4 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x4) 2027 #define PRS0_ASYNCH6_PC5 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x5) 2028 #define PRS0_ASYNCH6_PC6 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x6) 2029 #define PRS0_ASYNCH6_PC7 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x7) 2030 #define PRS0_ASYNCH6_PC8 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x8) 2031 #define PRS0_ASYNCH6_PC9 SILABS_DBUS_PRS0_ASYNCH6(0x2, 0x9) 2032 #define PRS0_ASYNCH6_PD0 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x0) 2033 #define PRS0_ASYNCH6_PD1 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x1) 2034 #define PRS0_ASYNCH6_PD2 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x2) 2035 #define PRS0_ASYNCH6_PD3 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x3) 2036 #define PRS0_ASYNCH6_PD4 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x4) 2037 #define PRS0_ASYNCH6_PD5 SILABS_DBUS_PRS0_ASYNCH6(0x3, 0x5) 2038 #define PRS0_ASYNCH7_PC0 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x0) 2039 #define PRS0_ASYNCH7_PC1 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x1) 2040 #define PRS0_ASYNCH7_PC2 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x2) 2041 #define PRS0_ASYNCH7_PC3 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x3) 2042 #define PRS0_ASYNCH7_PC4 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x4) 2043 #define PRS0_ASYNCH7_PC5 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x5) 2044 #define PRS0_ASYNCH7_PC6 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x6) 2045 #define PRS0_ASYNCH7_PC7 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x7) 2046 #define PRS0_ASYNCH7_PC8 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x8) 2047 #define PRS0_ASYNCH7_PC9 SILABS_DBUS_PRS0_ASYNCH7(0x2, 0x9) 2048 #define PRS0_ASYNCH7_PD0 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x0) 2049 #define PRS0_ASYNCH7_PD1 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x1) 2050 #define PRS0_ASYNCH7_PD2 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x2) 2051 #define PRS0_ASYNCH7_PD3 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x3) 2052 #define PRS0_ASYNCH7_PD4 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x4) 2053 #define PRS0_ASYNCH7_PD5 SILABS_DBUS_PRS0_ASYNCH7(0x3, 0x5) 2054 #define PRS0_ASYNCH8_PC0 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x0) 2055 #define PRS0_ASYNCH8_PC1 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x1) 2056 #define PRS0_ASYNCH8_PC2 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x2) 2057 #define PRS0_ASYNCH8_PC3 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x3) 2058 #define PRS0_ASYNCH8_PC4 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x4) 2059 #define PRS0_ASYNCH8_PC5 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x5) 2060 #define PRS0_ASYNCH8_PC6 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x6) 2061 #define PRS0_ASYNCH8_PC7 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x7) 2062 #define PRS0_ASYNCH8_PC8 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x8) 2063 #define PRS0_ASYNCH8_PC9 SILABS_DBUS_PRS0_ASYNCH8(0x2, 0x9) 2064 #define PRS0_ASYNCH8_PD0 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x0) 2065 #define PRS0_ASYNCH8_PD1 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x1) 2066 #define PRS0_ASYNCH8_PD2 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x2) 2067 #define PRS0_ASYNCH8_PD3 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x3) 2068 #define PRS0_ASYNCH8_PD4 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x4) 2069 #define PRS0_ASYNCH8_PD5 SILABS_DBUS_PRS0_ASYNCH8(0x3, 0x5) 2070 #define PRS0_ASYNCH9_PC0 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x0) 2071 #define PRS0_ASYNCH9_PC1 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x1) 2072 #define PRS0_ASYNCH9_PC2 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x2) 2073 #define PRS0_ASYNCH9_PC3 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x3) 2074 #define PRS0_ASYNCH9_PC4 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x4) 2075 #define PRS0_ASYNCH9_PC5 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x5) 2076 #define PRS0_ASYNCH9_PC6 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x6) 2077 #define PRS0_ASYNCH9_PC7 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x7) 2078 #define PRS0_ASYNCH9_PC8 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x8) 2079 #define PRS0_ASYNCH9_PC9 SILABS_DBUS_PRS0_ASYNCH9(0x2, 0x9) 2080 #define PRS0_ASYNCH9_PD0 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x0) 2081 #define PRS0_ASYNCH9_PD1 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x1) 2082 #define PRS0_ASYNCH9_PD2 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x2) 2083 #define PRS0_ASYNCH9_PD3 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x3) 2084 #define PRS0_ASYNCH9_PD4 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x4) 2085 #define PRS0_ASYNCH9_PD5 SILABS_DBUS_PRS0_ASYNCH9(0x3, 0x5) 2086 #define PRS0_ASYNCH10_PC0 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x0) 2087 #define PRS0_ASYNCH10_PC1 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x1) 2088 #define PRS0_ASYNCH10_PC2 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x2) 2089 #define PRS0_ASYNCH10_PC3 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x3) 2090 #define PRS0_ASYNCH10_PC4 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x4) 2091 #define PRS0_ASYNCH10_PC5 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x5) 2092 #define PRS0_ASYNCH10_PC6 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x6) 2093 #define PRS0_ASYNCH10_PC7 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x7) 2094 #define PRS0_ASYNCH10_PC8 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x8) 2095 #define PRS0_ASYNCH10_PC9 SILABS_DBUS_PRS0_ASYNCH10(0x2, 0x9) 2096 #define PRS0_ASYNCH10_PD0 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x0) 2097 #define PRS0_ASYNCH10_PD1 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x1) 2098 #define PRS0_ASYNCH10_PD2 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x2) 2099 #define PRS0_ASYNCH10_PD3 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x3) 2100 #define PRS0_ASYNCH10_PD4 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x4) 2101 #define PRS0_ASYNCH10_PD5 SILABS_DBUS_PRS0_ASYNCH10(0x3, 0x5) 2102 #define PRS0_ASYNCH11_PC0 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x0) 2103 #define PRS0_ASYNCH11_PC1 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x1) 2104 #define PRS0_ASYNCH11_PC2 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x2) 2105 #define PRS0_ASYNCH11_PC3 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x3) 2106 #define PRS0_ASYNCH11_PC4 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x4) 2107 #define PRS0_ASYNCH11_PC5 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x5) 2108 #define PRS0_ASYNCH11_PC6 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x6) 2109 #define PRS0_ASYNCH11_PC7 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x7) 2110 #define PRS0_ASYNCH11_PC8 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x8) 2111 #define PRS0_ASYNCH11_PC9 SILABS_DBUS_PRS0_ASYNCH11(0x2, 0x9) 2112 #define PRS0_ASYNCH11_PD0 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x0) 2113 #define PRS0_ASYNCH11_PD1 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x1) 2114 #define PRS0_ASYNCH11_PD2 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x2) 2115 #define PRS0_ASYNCH11_PD3 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x3) 2116 #define PRS0_ASYNCH11_PD4 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x4) 2117 #define PRS0_ASYNCH11_PD5 SILABS_DBUS_PRS0_ASYNCH11(0x3, 0x5) 2118 #define PRS0_SYNCH0_PA0 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x0) 2119 #define PRS0_SYNCH0_PA1 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x1) 2120 #define PRS0_SYNCH0_PA2 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x2) 2121 #define PRS0_SYNCH0_PA3 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x3) 2122 #define PRS0_SYNCH0_PA4 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x4) 2123 #define PRS0_SYNCH0_PA5 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x5) 2124 #define PRS0_SYNCH0_PA6 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x6) 2125 #define PRS0_SYNCH0_PA7 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x7) 2126 #define PRS0_SYNCH0_PA8 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x8) 2127 #define PRS0_SYNCH0_PA9 SILABS_DBUS_PRS0_SYNCH0(0x0, 0x9) 2128 #define PRS0_SYNCH0_PA10 SILABS_DBUS_PRS0_SYNCH0(0x0, 0xa) 2129 #define PRS0_SYNCH0_PB0 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x0) 2130 #define PRS0_SYNCH0_PB1 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x1) 2131 #define PRS0_SYNCH0_PB2 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x2) 2132 #define PRS0_SYNCH0_PB3 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x3) 2133 #define PRS0_SYNCH0_PB4 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x4) 2134 #define PRS0_SYNCH0_PB5 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x5) 2135 #define PRS0_SYNCH0_PB6 SILABS_DBUS_PRS0_SYNCH0(0x1, 0x6) 2136 #define PRS0_SYNCH0_PC0 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x0) 2137 #define PRS0_SYNCH0_PC1 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x1) 2138 #define PRS0_SYNCH0_PC2 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x2) 2139 #define PRS0_SYNCH0_PC3 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x3) 2140 #define PRS0_SYNCH0_PC4 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x4) 2141 #define PRS0_SYNCH0_PC5 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x5) 2142 #define PRS0_SYNCH0_PC6 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x6) 2143 #define PRS0_SYNCH0_PC7 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x7) 2144 #define PRS0_SYNCH0_PC8 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x8) 2145 #define PRS0_SYNCH0_PC9 SILABS_DBUS_PRS0_SYNCH0(0x2, 0x9) 2146 #define PRS0_SYNCH0_PD0 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x0) 2147 #define PRS0_SYNCH0_PD1 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x1) 2148 #define PRS0_SYNCH0_PD2 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x2) 2149 #define PRS0_SYNCH0_PD3 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x3) 2150 #define PRS0_SYNCH0_PD4 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x4) 2151 #define PRS0_SYNCH0_PD5 SILABS_DBUS_PRS0_SYNCH0(0x3, 0x5) 2152 #define PRS0_SYNCH1_PA0 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x0) 2153 #define PRS0_SYNCH1_PA1 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x1) 2154 #define PRS0_SYNCH1_PA2 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x2) 2155 #define PRS0_SYNCH1_PA3 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x3) 2156 #define PRS0_SYNCH1_PA4 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x4) 2157 #define PRS0_SYNCH1_PA5 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x5) 2158 #define PRS0_SYNCH1_PA6 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x6) 2159 #define PRS0_SYNCH1_PA7 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x7) 2160 #define PRS0_SYNCH1_PA8 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x8) 2161 #define PRS0_SYNCH1_PA9 SILABS_DBUS_PRS0_SYNCH1(0x0, 0x9) 2162 #define PRS0_SYNCH1_PA10 SILABS_DBUS_PRS0_SYNCH1(0x0, 0xa) 2163 #define PRS0_SYNCH1_PB0 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x0) 2164 #define PRS0_SYNCH1_PB1 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x1) 2165 #define PRS0_SYNCH1_PB2 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x2) 2166 #define PRS0_SYNCH1_PB3 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x3) 2167 #define PRS0_SYNCH1_PB4 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x4) 2168 #define PRS0_SYNCH1_PB5 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x5) 2169 #define PRS0_SYNCH1_PB6 SILABS_DBUS_PRS0_SYNCH1(0x1, 0x6) 2170 #define PRS0_SYNCH1_PC0 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x0) 2171 #define PRS0_SYNCH1_PC1 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x1) 2172 #define PRS0_SYNCH1_PC2 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x2) 2173 #define PRS0_SYNCH1_PC3 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x3) 2174 #define PRS0_SYNCH1_PC4 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x4) 2175 #define PRS0_SYNCH1_PC5 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x5) 2176 #define PRS0_SYNCH1_PC6 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x6) 2177 #define PRS0_SYNCH1_PC7 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x7) 2178 #define PRS0_SYNCH1_PC8 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x8) 2179 #define PRS0_SYNCH1_PC9 SILABS_DBUS_PRS0_SYNCH1(0x2, 0x9) 2180 #define PRS0_SYNCH1_PD0 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x0) 2181 #define PRS0_SYNCH1_PD1 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x1) 2182 #define PRS0_SYNCH1_PD2 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x2) 2183 #define PRS0_SYNCH1_PD3 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x3) 2184 #define PRS0_SYNCH1_PD4 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x4) 2185 #define PRS0_SYNCH1_PD5 SILABS_DBUS_PRS0_SYNCH1(0x3, 0x5) 2186 #define PRS0_SYNCH2_PA0 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x0) 2187 #define PRS0_SYNCH2_PA1 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x1) 2188 #define PRS0_SYNCH2_PA2 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x2) 2189 #define PRS0_SYNCH2_PA3 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x3) 2190 #define PRS0_SYNCH2_PA4 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x4) 2191 #define PRS0_SYNCH2_PA5 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x5) 2192 #define PRS0_SYNCH2_PA6 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x6) 2193 #define PRS0_SYNCH2_PA7 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x7) 2194 #define PRS0_SYNCH2_PA8 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x8) 2195 #define PRS0_SYNCH2_PA9 SILABS_DBUS_PRS0_SYNCH2(0x0, 0x9) 2196 #define PRS0_SYNCH2_PA10 SILABS_DBUS_PRS0_SYNCH2(0x0, 0xa) 2197 #define PRS0_SYNCH2_PB0 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x0) 2198 #define PRS0_SYNCH2_PB1 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x1) 2199 #define PRS0_SYNCH2_PB2 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x2) 2200 #define PRS0_SYNCH2_PB3 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x3) 2201 #define PRS0_SYNCH2_PB4 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x4) 2202 #define PRS0_SYNCH2_PB5 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x5) 2203 #define PRS0_SYNCH2_PB6 SILABS_DBUS_PRS0_SYNCH2(0x1, 0x6) 2204 #define PRS0_SYNCH2_PC0 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x0) 2205 #define PRS0_SYNCH2_PC1 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x1) 2206 #define PRS0_SYNCH2_PC2 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x2) 2207 #define PRS0_SYNCH2_PC3 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x3) 2208 #define PRS0_SYNCH2_PC4 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x4) 2209 #define PRS0_SYNCH2_PC5 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x5) 2210 #define PRS0_SYNCH2_PC6 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x6) 2211 #define PRS0_SYNCH2_PC7 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x7) 2212 #define PRS0_SYNCH2_PC8 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x8) 2213 #define PRS0_SYNCH2_PC9 SILABS_DBUS_PRS0_SYNCH2(0x2, 0x9) 2214 #define PRS0_SYNCH2_PD0 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x0) 2215 #define PRS0_SYNCH2_PD1 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x1) 2216 #define PRS0_SYNCH2_PD2 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x2) 2217 #define PRS0_SYNCH2_PD3 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x3) 2218 #define PRS0_SYNCH2_PD4 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x4) 2219 #define PRS0_SYNCH2_PD5 SILABS_DBUS_PRS0_SYNCH2(0x3, 0x5) 2220 #define PRS0_SYNCH3_PA0 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x0) 2221 #define PRS0_SYNCH3_PA1 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x1) 2222 #define PRS0_SYNCH3_PA2 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x2) 2223 #define PRS0_SYNCH3_PA3 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x3) 2224 #define PRS0_SYNCH3_PA4 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x4) 2225 #define PRS0_SYNCH3_PA5 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x5) 2226 #define PRS0_SYNCH3_PA6 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x6) 2227 #define PRS0_SYNCH3_PA7 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x7) 2228 #define PRS0_SYNCH3_PA8 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x8) 2229 #define PRS0_SYNCH3_PA9 SILABS_DBUS_PRS0_SYNCH3(0x0, 0x9) 2230 #define PRS0_SYNCH3_PA10 SILABS_DBUS_PRS0_SYNCH3(0x0, 0xa) 2231 #define PRS0_SYNCH3_PB0 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x0) 2232 #define PRS0_SYNCH3_PB1 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x1) 2233 #define PRS0_SYNCH3_PB2 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x2) 2234 #define PRS0_SYNCH3_PB3 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x3) 2235 #define PRS0_SYNCH3_PB4 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x4) 2236 #define PRS0_SYNCH3_PB5 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x5) 2237 #define PRS0_SYNCH3_PB6 SILABS_DBUS_PRS0_SYNCH3(0x1, 0x6) 2238 #define PRS0_SYNCH3_PC0 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x0) 2239 #define PRS0_SYNCH3_PC1 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x1) 2240 #define PRS0_SYNCH3_PC2 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x2) 2241 #define PRS0_SYNCH3_PC3 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x3) 2242 #define PRS0_SYNCH3_PC4 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x4) 2243 #define PRS0_SYNCH3_PC5 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x5) 2244 #define PRS0_SYNCH3_PC6 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x6) 2245 #define PRS0_SYNCH3_PC7 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x7) 2246 #define PRS0_SYNCH3_PC8 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x8) 2247 #define PRS0_SYNCH3_PC9 SILABS_DBUS_PRS0_SYNCH3(0x2, 0x9) 2248 #define PRS0_SYNCH3_PD0 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x0) 2249 #define PRS0_SYNCH3_PD1 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x1) 2250 #define PRS0_SYNCH3_PD2 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x2) 2251 #define PRS0_SYNCH3_PD3 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x3) 2252 #define PRS0_SYNCH3_PD4 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x4) 2253 #define PRS0_SYNCH3_PD5 SILABS_DBUS_PRS0_SYNCH3(0x3, 0x5) 2254 2255 #define HFXO0_BUFOUTREQINASYNC_PA0 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x0) 2256 #define HFXO0_BUFOUTREQINASYNC_PA1 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x1) 2257 #define HFXO0_BUFOUTREQINASYNC_PA2 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x2) 2258 #define HFXO0_BUFOUTREQINASYNC_PA3 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x3) 2259 #define HFXO0_BUFOUTREQINASYNC_PA4 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x4) 2260 #define HFXO0_BUFOUTREQINASYNC_PA5 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x5) 2261 #define HFXO0_BUFOUTREQINASYNC_PA6 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x6) 2262 #define HFXO0_BUFOUTREQINASYNC_PA7 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x7) 2263 #define HFXO0_BUFOUTREQINASYNC_PA8 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x8) 2264 #define HFXO0_BUFOUTREQINASYNC_PA9 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0x9) 2265 #define HFXO0_BUFOUTREQINASYNC_PA10 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x0, 0xa) 2266 #define HFXO0_BUFOUTREQINASYNC_PB0 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x0) 2267 #define HFXO0_BUFOUTREQINASYNC_PB1 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x1) 2268 #define HFXO0_BUFOUTREQINASYNC_PB2 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x2) 2269 #define HFXO0_BUFOUTREQINASYNC_PB3 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x3) 2270 #define HFXO0_BUFOUTREQINASYNC_PB4 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x4) 2271 #define HFXO0_BUFOUTREQINASYNC_PB5 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x5) 2272 #define HFXO0_BUFOUTREQINASYNC_PB6 SILABS_DBUS_HFXO0_BUFOUTREQINASYNC(0x1, 0x6) 2273 2274 #define TIMER0_CC0_PA0 SILABS_DBUS_TIMER0_CC0(0x0, 0x0) 2275 #define TIMER0_CC0_PA1 SILABS_DBUS_TIMER0_CC0(0x0, 0x1) 2276 #define TIMER0_CC0_PA2 SILABS_DBUS_TIMER0_CC0(0x0, 0x2) 2277 #define TIMER0_CC0_PA3 SILABS_DBUS_TIMER0_CC0(0x0, 0x3) 2278 #define TIMER0_CC0_PA4 SILABS_DBUS_TIMER0_CC0(0x0, 0x4) 2279 #define TIMER0_CC0_PA5 SILABS_DBUS_TIMER0_CC0(0x0, 0x5) 2280 #define TIMER0_CC0_PA6 SILABS_DBUS_TIMER0_CC0(0x0, 0x6) 2281 #define TIMER0_CC0_PA7 SILABS_DBUS_TIMER0_CC0(0x0, 0x7) 2282 #define TIMER0_CC0_PA8 SILABS_DBUS_TIMER0_CC0(0x0, 0x8) 2283 #define TIMER0_CC0_PA9 SILABS_DBUS_TIMER0_CC0(0x0, 0x9) 2284 #define TIMER0_CC0_PA10 SILABS_DBUS_TIMER0_CC0(0x0, 0xa) 2285 #define TIMER0_CC0_PB0 SILABS_DBUS_TIMER0_CC0(0x1, 0x0) 2286 #define TIMER0_CC0_PB1 SILABS_DBUS_TIMER0_CC0(0x1, 0x1) 2287 #define TIMER0_CC0_PB2 SILABS_DBUS_TIMER0_CC0(0x1, 0x2) 2288 #define TIMER0_CC0_PB3 SILABS_DBUS_TIMER0_CC0(0x1, 0x3) 2289 #define TIMER0_CC0_PB4 SILABS_DBUS_TIMER0_CC0(0x1, 0x4) 2290 #define TIMER0_CC0_PB5 SILABS_DBUS_TIMER0_CC0(0x1, 0x5) 2291 #define TIMER0_CC0_PB6 SILABS_DBUS_TIMER0_CC0(0x1, 0x6) 2292 #define TIMER0_CC0_PC0 SILABS_DBUS_TIMER0_CC0(0x2, 0x0) 2293 #define TIMER0_CC0_PC1 SILABS_DBUS_TIMER0_CC0(0x2, 0x1) 2294 #define TIMER0_CC0_PC2 SILABS_DBUS_TIMER0_CC0(0x2, 0x2) 2295 #define TIMER0_CC0_PC3 SILABS_DBUS_TIMER0_CC0(0x2, 0x3) 2296 #define TIMER0_CC0_PC4 SILABS_DBUS_TIMER0_CC0(0x2, 0x4) 2297 #define TIMER0_CC0_PC5 SILABS_DBUS_TIMER0_CC0(0x2, 0x5) 2298 #define TIMER0_CC0_PC6 SILABS_DBUS_TIMER0_CC0(0x2, 0x6) 2299 #define TIMER0_CC0_PC7 SILABS_DBUS_TIMER0_CC0(0x2, 0x7) 2300 #define TIMER0_CC0_PC8 SILABS_DBUS_TIMER0_CC0(0x2, 0x8) 2301 #define TIMER0_CC0_PC9 SILABS_DBUS_TIMER0_CC0(0x2, 0x9) 2302 #define TIMER0_CC0_PD0 SILABS_DBUS_TIMER0_CC0(0x3, 0x0) 2303 #define TIMER0_CC0_PD1 SILABS_DBUS_TIMER0_CC0(0x3, 0x1) 2304 #define TIMER0_CC0_PD2 SILABS_DBUS_TIMER0_CC0(0x3, 0x2) 2305 #define TIMER0_CC0_PD3 SILABS_DBUS_TIMER0_CC0(0x3, 0x3) 2306 #define TIMER0_CC0_PD4 SILABS_DBUS_TIMER0_CC0(0x3, 0x4) 2307 #define TIMER0_CC0_PD5 SILABS_DBUS_TIMER0_CC0(0x3, 0x5) 2308 #define TIMER0_CC1_PA0 SILABS_DBUS_TIMER0_CC1(0x0, 0x0) 2309 #define TIMER0_CC1_PA1 SILABS_DBUS_TIMER0_CC1(0x0, 0x1) 2310 #define TIMER0_CC1_PA2 SILABS_DBUS_TIMER0_CC1(0x0, 0x2) 2311 #define TIMER0_CC1_PA3 SILABS_DBUS_TIMER0_CC1(0x0, 0x3) 2312 #define TIMER0_CC1_PA4 SILABS_DBUS_TIMER0_CC1(0x0, 0x4) 2313 #define TIMER0_CC1_PA5 SILABS_DBUS_TIMER0_CC1(0x0, 0x5) 2314 #define TIMER0_CC1_PA6 SILABS_DBUS_TIMER0_CC1(0x0, 0x6) 2315 #define TIMER0_CC1_PA7 SILABS_DBUS_TIMER0_CC1(0x0, 0x7) 2316 #define TIMER0_CC1_PA8 SILABS_DBUS_TIMER0_CC1(0x0, 0x8) 2317 #define TIMER0_CC1_PA9 SILABS_DBUS_TIMER0_CC1(0x0, 0x9) 2318 #define TIMER0_CC1_PA10 SILABS_DBUS_TIMER0_CC1(0x0, 0xa) 2319 #define TIMER0_CC1_PB0 SILABS_DBUS_TIMER0_CC1(0x1, 0x0) 2320 #define TIMER0_CC1_PB1 SILABS_DBUS_TIMER0_CC1(0x1, 0x1) 2321 #define TIMER0_CC1_PB2 SILABS_DBUS_TIMER0_CC1(0x1, 0x2) 2322 #define TIMER0_CC1_PB3 SILABS_DBUS_TIMER0_CC1(0x1, 0x3) 2323 #define TIMER0_CC1_PB4 SILABS_DBUS_TIMER0_CC1(0x1, 0x4) 2324 #define TIMER0_CC1_PB5 SILABS_DBUS_TIMER0_CC1(0x1, 0x5) 2325 #define TIMER0_CC1_PB6 SILABS_DBUS_TIMER0_CC1(0x1, 0x6) 2326 #define TIMER0_CC1_PC0 SILABS_DBUS_TIMER0_CC1(0x2, 0x0) 2327 #define TIMER0_CC1_PC1 SILABS_DBUS_TIMER0_CC1(0x2, 0x1) 2328 #define TIMER0_CC1_PC2 SILABS_DBUS_TIMER0_CC1(0x2, 0x2) 2329 #define TIMER0_CC1_PC3 SILABS_DBUS_TIMER0_CC1(0x2, 0x3) 2330 #define TIMER0_CC1_PC4 SILABS_DBUS_TIMER0_CC1(0x2, 0x4) 2331 #define TIMER0_CC1_PC5 SILABS_DBUS_TIMER0_CC1(0x2, 0x5) 2332 #define TIMER0_CC1_PC6 SILABS_DBUS_TIMER0_CC1(0x2, 0x6) 2333 #define TIMER0_CC1_PC7 SILABS_DBUS_TIMER0_CC1(0x2, 0x7) 2334 #define TIMER0_CC1_PC8 SILABS_DBUS_TIMER0_CC1(0x2, 0x8) 2335 #define TIMER0_CC1_PC9 SILABS_DBUS_TIMER0_CC1(0x2, 0x9) 2336 #define TIMER0_CC1_PD0 SILABS_DBUS_TIMER0_CC1(0x3, 0x0) 2337 #define TIMER0_CC1_PD1 SILABS_DBUS_TIMER0_CC1(0x3, 0x1) 2338 #define TIMER0_CC1_PD2 SILABS_DBUS_TIMER0_CC1(0x3, 0x2) 2339 #define TIMER0_CC1_PD3 SILABS_DBUS_TIMER0_CC1(0x3, 0x3) 2340 #define TIMER0_CC1_PD4 SILABS_DBUS_TIMER0_CC1(0x3, 0x4) 2341 #define TIMER0_CC1_PD5 SILABS_DBUS_TIMER0_CC1(0x3, 0x5) 2342 #define TIMER0_CC2_PA0 SILABS_DBUS_TIMER0_CC2(0x0, 0x0) 2343 #define TIMER0_CC2_PA1 SILABS_DBUS_TIMER0_CC2(0x0, 0x1) 2344 #define TIMER0_CC2_PA2 SILABS_DBUS_TIMER0_CC2(0x0, 0x2) 2345 #define TIMER0_CC2_PA3 SILABS_DBUS_TIMER0_CC2(0x0, 0x3) 2346 #define TIMER0_CC2_PA4 SILABS_DBUS_TIMER0_CC2(0x0, 0x4) 2347 #define TIMER0_CC2_PA5 SILABS_DBUS_TIMER0_CC2(0x0, 0x5) 2348 #define TIMER0_CC2_PA6 SILABS_DBUS_TIMER0_CC2(0x0, 0x6) 2349 #define TIMER0_CC2_PA7 SILABS_DBUS_TIMER0_CC2(0x0, 0x7) 2350 #define TIMER0_CC2_PA8 SILABS_DBUS_TIMER0_CC2(0x0, 0x8) 2351 #define TIMER0_CC2_PA9 SILABS_DBUS_TIMER0_CC2(0x0, 0x9) 2352 #define TIMER0_CC2_PA10 SILABS_DBUS_TIMER0_CC2(0x0, 0xa) 2353 #define TIMER0_CC2_PB0 SILABS_DBUS_TIMER0_CC2(0x1, 0x0) 2354 #define TIMER0_CC2_PB1 SILABS_DBUS_TIMER0_CC2(0x1, 0x1) 2355 #define TIMER0_CC2_PB2 SILABS_DBUS_TIMER0_CC2(0x1, 0x2) 2356 #define TIMER0_CC2_PB3 SILABS_DBUS_TIMER0_CC2(0x1, 0x3) 2357 #define TIMER0_CC2_PB4 SILABS_DBUS_TIMER0_CC2(0x1, 0x4) 2358 #define TIMER0_CC2_PB5 SILABS_DBUS_TIMER0_CC2(0x1, 0x5) 2359 #define TIMER0_CC2_PB6 SILABS_DBUS_TIMER0_CC2(0x1, 0x6) 2360 #define TIMER0_CC2_PC0 SILABS_DBUS_TIMER0_CC2(0x2, 0x0) 2361 #define TIMER0_CC2_PC1 SILABS_DBUS_TIMER0_CC2(0x2, 0x1) 2362 #define TIMER0_CC2_PC2 SILABS_DBUS_TIMER0_CC2(0x2, 0x2) 2363 #define TIMER0_CC2_PC3 SILABS_DBUS_TIMER0_CC2(0x2, 0x3) 2364 #define TIMER0_CC2_PC4 SILABS_DBUS_TIMER0_CC2(0x2, 0x4) 2365 #define TIMER0_CC2_PC5 SILABS_DBUS_TIMER0_CC2(0x2, 0x5) 2366 #define TIMER0_CC2_PC6 SILABS_DBUS_TIMER0_CC2(0x2, 0x6) 2367 #define TIMER0_CC2_PC7 SILABS_DBUS_TIMER0_CC2(0x2, 0x7) 2368 #define TIMER0_CC2_PC8 SILABS_DBUS_TIMER0_CC2(0x2, 0x8) 2369 #define TIMER0_CC2_PC9 SILABS_DBUS_TIMER0_CC2(0x2, 0x9) 2370 #define TIMER0_CC2_PD0 SILABS_DBUS_TIMER0_CC2(0x3, 0x0) 2371 #define TIMER0_CC2_PD1 SILABS_DBUS_TIMER0_CC2(0x3, 0x1) 2372 #define TIMER0_CC2_PD2 SILABS_DBUS_TIMER0_CC2(0x3, 0x2) 2373 #define TIMER0_CC2_PD3 SILABS_DBUS_TIMER0_CC2(0x3, 0x3) 2374 #define TIMER0_CC2_PD4 SILABS_DBUS_TIMER0_CC2(0x3, 0x4) 2375 #define TIMER0_CC2_PD5 SILABS_DBUS_TIMER0_CC2(0x3, 0x5) 2376 #define TIMER0_CDTI0_PA0 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x0) 2377 #define TIMER0_CDTI0_PA1 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x1) 2378 #define TIMER0_CDTI0_PA2 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x2) 2379 #define TIMER0_CDTI0_PA3 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x3) 2380 #define TIMER0_CDTI0_PA4 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x4) 2381 #define TIMER0_CDTI0_PA5 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x5) 2382 #define TIMER0_CDTI0_PA6 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x6) 2383 #define TIMER0_CDTI0_PA7 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x7) 2384 #define TIMER0_CDTI0_PA8 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x8) 2385 #define TIMER0_CDTI0_PA9 SILABS_DBUS_TIMER0_CDTI0(0x0, 0x9) 2386 #define TIMER0_CDTI0_PA10 SILABS_DBUS_TIMER0_CDTI0(0x0, 0xa) 2387 #define TIMER0_CDTI0_PB0 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x0) 2388 #define TIMER0_CDTI0_PB1 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x1) 2389 #define TIMER0_CDTI0_PB2 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x2) 2390 #define TIMER0_CDTI0_PB3 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x3) 2391 #define TIMER0_CDTI0_PB4 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x4) 2392 #define TIMER0_CDTI0_PB5 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x5) 2393 #define TIMER0_CDTI0_PB6 SILABS_DBUS_TIMER0_CDTI0(0x1, 0x6) 2394 #define TIMER0_CDTI0_PC0 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x0) 2395 #define TIMER0_CDTI0_PC1 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x1) 2396 #define TIMER0_CDTI0_PC2 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x2) 2397 #define TIMER0_CDTI0_PC3 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x3) 2398 #define TIMER0_CDTI0_PC4 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x4) 2399 #define TIMER0_CDTI0_PC5 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x5) 2400 #define TIMER0_CDTI0_PC6 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x6) 2401 #define TIMER0_CDTI0_PC7 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x7) 2402 #define TIMER0_CDTI0_PC8 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x8) 2403 #define TIMER0_CDTI0_PC9 SILABS_DBUS_TIMER0_CDTI0(0x2, 0x9) 2404 #define TIMER0_CDTI0_PD0 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x0) 2405 #define TIMER0_CDTI0_PD1 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x1) 2406 #define TIMER0_CDTI0_PD2 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x2) 2407 #define TIMER0_CDTI0_PD3 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x3) 2408 #define TIMER0_CDTI0_PD4 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x4) 2409 #define TIMER0_CDTI0_PD5 SILABS_DBUS_TIMER0_CDTI0(0x3, 0x5) 2410 #define TIMER0_CDTI1_PA0 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x0) 2411 #define TIMER0_CDTI1_PA1 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x1) 2412 #define TIMER0_CDTI1_PA2 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x2) 2413 #define TIMER0_CDTI1_PA3 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x3) 2414 #define TIMER0_CDTI1_PA4 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x4) 2415 #define TIMER0_CDTI1_PA5 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x5) 2416 #define TIMER0_CDTI1_PA6 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x6) 2417 #define TIMER0_CDTI1_PA7 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x7) 2418 #define TIMER0_CDTI1_PA8 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x8) 2419 #define TIMER0_CDTI1_PA9 SILABS_DBUS_TIMER0_CDTI1(0x0, 0x9) 2420 #define TIMER0_CDTI1_PA10 SILABS_DBUS_TIMER0_CDTI1(0x0, 0xa) 2421 #define TIMER0_CDTI1_PB0 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x0) 2422 #define TIMER0_CDTI1_PB1 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x1) 2423 #define TIMER0_CDTI1_PB2 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x2) 2424 #define TIMER0_CDTI1_PB3 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x3) 2425 #define TIMER0_CDTI1_PB4 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x4) 2426 #define TIMER0_CDTI1_PB5 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x5) 2427 #define TIMER0_CDTI1_PB6 SILABS_DBUS_TIMER0_CDTI1(0x1, 0x6) 2428 #define TIMER0_CDTI1_PC0 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x0) 2429 #define TIMER0_CDTI1_PC1 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x1) 2430 #define TIMER0_CDTI1_PC2 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x2) 2431 #define TIMER0_CDTI1_PC3 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x3) 2432 #define TIMER0_CDTI1_PC4 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x4) 2433 #define TIMER0_CDTI1_PC5 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x5) 2434 #define TIMER0_CDTI1_PC6 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x6) 2435 #define TIMER0_CDTI1_PC7 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x7) 2436 #define TIMER0_CDTI1_PC8 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x8) 2437 #define TIMER0_CDTI1_PC9 SILABS_DBUS_TIMER0_CDTI1(0x2, 0x9) 2438 #define TIMER0_CDTI1_PD0 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x0) 2439 #define TIMER0_CDTI1_PD1 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x1) 2440 #define TIMER0_CDTI1_PD2 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x2) 2441 #define TIMER0_CDTI1_PD3 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x3) 2442 #define TIMER0_CDTI1_PD4 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x4) 2443 #define TIMER0_CDTI1_PD5 SILABS_DBUS_TIMER0_CDTI1(0x3, 0x5) 2444 #define TIMER0_CDTI2_PA0 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x0) 2445 #define TIMER0_CDTI2_PA1 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x1) 2446 #define TIMER0_CDTI2_PA2 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x2) 2447 #define TIMER0_CDTI2_PA3 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x3) 2448 #define TIMER0_CDTI2_PA4 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x4) 2449 #define TIMER0_CDTI2_PA5 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x5) 2450 #define TIMER0_CDTI2_PA6 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x6) 2451 #define TIMER0_CDTI2_PA7 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x7) 2452 #define TIMER0_CDTI2_PA8 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x8) 2453 #define TIMER0_CDTI2_PA9 SILABS_DBUS_TIMER0_CDTI2(0x0, 0x9) 2454 #define TIMER0_CDTI2_PA10 SILABS_DBUS_TIMER0_CDTI2(0x0, 0xa) 2455 #define TIMER0_CDTI2_PB0 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x0) 2456 #define TIMER0_CDTI2_PB1 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x1) 2457 #define TIMER0_CDTI2_PB2 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x2) 2458 #define TIMER0_CDTI2_PB3 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x3) 2459 #define TIMER0_CDTI2_PB4 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x4) 2460 #define TIMER0_CDTI2_PB5 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x5) 2461 #define TIMER0_CDTI2_PB6 SILABS_DBUS_TIMER0_CDTI2(0x1, 0x6) 2462 #define TIMER0_CDTI2_PC0 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x0) 2463 #define TIMER0_CDTI2_PC1 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x1) 2464 #define TIMER0_CDTI2_PC2 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x2) 2465 #define TIMER0_CDTI2_PC3 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x3) 2466 #define TIMER0_CDTI2_PC4 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x4) 2467 #define TIMER0_CDTI2_PC5 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x5) 2468 #define TIMER0_CDTI2_PC6 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x6) 2469 #define TIMER0_CDTI2_PC7 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x7) 2470 #define TIMER0_CDTI2_PC8 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x8) 2471 #define TIMER0_CDTI2_PC9 SILABS_DBUS_TIMER0_CDTI2(0x2, 0x9) 2472 #define TIMER0_CDTI2_PD0 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x0) 2473 #define TIMER0_CDTI2_PD1 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x1) 2474 #define TIMER0_CDTI2_PD2 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x2) 2475 #define TIMER0_CDTI2_PD3 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x3) 2476 #define TIMER0_CDTI2_PD4 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x4) 2477 #define TIMER0_CDTI2_PD5 SILABS_DBUS_TIMER0_CDTI2(0x3, 0x5) 2478 2479 #define TIMER1_CC0_PA0 SILABS_DBUS_TIMER1_CC0(0x0, 0x0) 2480 #define TIMER1_CC0_PA1 SILABS_DBUS_TIMER1_CC0(0x0, 0x1) 2481 #define TIMER1_CC0_PA2 SILABS_DBUS_TIMER1_CC0(0x0, 0x2) 2482 #define TIMER1_CC0_PA3 SILABS_DBUS_TIMER1_CC0(0x0, 0x3) 2483 #define TIMER1_CC0_PA4 SILABS_DBUS_TIMER1_CC0(0x0, 0x4) 2484 #define TIMER1_CC0_PA5 SILABS_DBUS_TIMER1_CC0(0x0, 0x5) 2485 #define TIMER1_CC0_PA6 SILABS_DBUS_TIMER1_CC0(0x0, 0x6) 2486 #define TIMER1_CC0_PA7 SILABS_DBUS_TIMER1_CC0(0x0, 0x7) 2487 #define TIMER1_CC0_PA8 SILABS_DBUS_TIMER1_CC0(0x0, 0x8) 2488 #define TIMER1_CC0_PA9 SILABS_DBUS_TIMER1_CC0(0x0, 0x9) 2489 #define TIMER1_CC0_PA10 SILABS_DBUS_TIMER1_CC0(0x0, 0xa) 2490 #define TIMER1_CC0_PB0 SILABS_DBUS_TIMER1_CC0(0x1, 0x0) 2491 #define TIMER1_CC0_PB1 SILABS_DBUS_TIMER1_CC0(0x1, 0x1) 2492 #define TIMER1_CC0_PB2 SILABS_DBUS_TIMER1_CC0(0x1, 0x2) 2493 #define TIMER1_CC0_PB3 SILABS_DBUS_TIMER1_CC0(0x1, 0x3) 2494 #define TIMER1_CC0_PB4 SILABS_DBUS_TIMER1_CC0(0x1, 0x4) 2495 #define TIMER1_CC0_PB5 SILABS_DBUS_TIMER1_CC0(0x1, 0x5) 2496 #define TIMER1_CC0_PB6 SILABS_DBUS_TIMER1_CC0(0x1, 0x6) 2497 #define TIMER1_CC0_PC0 SILABS_DBUS_TIMER1_CC0(0x2, 0x0) 2498 #define TIMER1_CC0_PC1 SILABS_DBUS_TIMER1_CC0(0x2, 0x1) 2499 #define TIMER1_CC0_PC2 SILABS_DBUS_TIMER1_CC0(0x2, 0x2) 2500 #define TIMER1_CC0_PC3 SILABS_DBUS_TIMER1_CC0(0x2, 0x3) 2501 #define TIMER1_CC0_PC4 SILABS_DBUS_TIMER1_CC0(0x2, 0x4) 2502 #define TIMER1_CC0_PC5 SILABS_DBUS_TIMER1_CC0(0x2, 0x5) 2503 #define TIMER1_CC0_PC6 SILABS_DBUS_TIMER1_CC0(0x2, 0x6) 2504 #define TIMER1_CC0_PC7 SILABS_DBUS_TIMER1_CC0(0x2, 0x7) 2505 #define TIMER1_CC0_PC8 SILABS_DBUS_TIMER1_CC0(0x2, 0x8) 2506 #define TIMER1_CC0_PC9 SILABS_DBUS_TIMER1_CC0(0x2, 0x9) 2507 #define TIMER1_CC0_PD0 SILABS_DBUS_TIMER1_CC0(0x3, 0x0) 2508 #define TIMER1_CC0_PD1 SILABS_DBUS_TIMER1_CC0(0x3, 0x1) 2509 #define TIMER1_CC0_PD2 SILABS_DBUS_TIMER1_CC0(0x3, 0x2) 2510 #define TIMER1_CC0_PD3 SILABS_DBUS_TIMER1_CC0(0x3, 0x3) 2511 #define TIMER1_CC0_PD4 SILABS_DBUS_TIMER1_CC0(0x3, 0x4) 2512 #define TIMER1_CC0_PD5 SILABS_DBUS_TIMER1_CC0(0x3, 0x5) 2513 #define TIMER1_CC1_PA0 SILABS_DBUS_TIMER1_CC1(0x0, 0x0) 2514 #define TIMER1_CC1_PA1 SILABS_DBUS_TIMER1_CC1(0x0, 0x1) 2515 #define TIMER1_CC1_PA2 SILABS_DBUS_TIMER1_CC1(0x0, 0x2) 2516 #define TIMER1_CC1_PA3 SILABS_DBUS_TIMER1_CC1(0x0, 0x3) 2517 #define TIMER1_CC1_PA4 SILABS_DBUS_TIMER1_CC1(0x0, 0x4) 2518 #define TIMER1_CC1_PA5 SILABS_DBUS_TIMER1_CC1(0x0, 0x5) 2519 #define TIMER1_CC1_PA6 SILABS_DBUS_TIMER1_CC1(0x0, 0x6) 2520 #define TIMER1_CC1_PA7 SILABS_DBUS_TIMER1_CC1(0x0, 0x7) 2521 #define TIMER1_CC1_PA8 SILABS_DBUS_TIMER1_CC1(0x0, 0x8) 2522 #define TIMER1_CC1_PA9 SILABS_DBUS_TIMER1_CC1(0x0, 0x9) 2523 #define TIMER1_CC1_PA10 SILABS_DBUS_TIMER1_CC1(0x0, 0xa) 2524 #define TIMER1_CC1_PB0 SILABS_DBUS_TIMER1_CC1(0x1, 0x0) 2525 #define TIMER1_CC1_PB1 SILABS_DBUS_TIMER1_CC1(0x1, 0x1) 2526 #define TIMER1_CC1_PB2 SILABS_DBUS_TIMER1_CC1(0x1, 0x2) 2527 #define TIMER1_CC1_PB3 SILABS_DBUS_TIMER1_CC1(0x1, 0x3) 2528 #define TIMER1_CC1_PB4 SILABS_DBUS_TIMER1_CC1(0x1, 0x4) 2529 #define TIMER1_CC1_PB5 SILABS_DBUS_TIMER1_CC1(0x1, 0x5) 2530 #define TIMER1_CC1_PB6 SILABS_DBUS_TIMER1_CC1(0x1, 0x6) 2531 #define TIMER1_CC1_PC0 SILABS_DBUS_TIMER1_CC1(0x2, 0x0) 2532 #define TIMER1_CC1_PC1 SILABS_DBUS_TIMER1_CC1(0x2, 0x1) 2533 #define TIMER1_CC1_PC2 SILABS_DBUS_TIMER1_CC1(0x2, 0x2) 2534 #define TIMER1_CC1_PC3 SILABS_DBUS_TIMER1_CC1(0x2, 0x3) 2535 #define TIMER1_CC1_PC4 SILABS_DBUS_TIMER1_CC1(0x2, 0x4) 2536 #define TIMER1_CC1_PC5 SILABS_DBUS_TIMER1_CC1(0x2, 0x5) 2537 #define TIMER1_CC1_PC6 SILABS_DBUS_TIMER1_CC1(0x2, 0x6) 2538 #define TIMER1_CC1_PC7 SILABS_DBUS_TIMER1_CC1(0x2, 0x7) 2539 #define TIMER1_CC1_PC8 SILABS_DBUS_TIMER1_CC1(0x2, 0x8) 2540 #define TIMER1_CC1_PC9 SILABS_DBUS_TIMER1_CC1(0x2, 0x9) 2541 #define TIMER1_CC1_PD0 SILABS_DBUS_TIMER1_CC1(0x3, 0x0) 2542 #define TIMER1_CC1_PD1 SILABS_DBUS_TIMER1_CC1(0x3, 0x1) 2543 #define TIMER1_CC1_PD2 SILABS_DBUS_TIMER1_CC1(0x3, 0x2) 2544 #define TIMER1_CC1_PD3 SILABS_DBUS_TIMER1_CC1(0x3, 0x3) 2545 #define TIMER1_CC1_PD4 SILABS_DBUS_TIMER1_CC1(0x3, 0x4) 2546 #define TIMER1_CC1_PD5 SILABS_DBUS_TIMER1_CC1(0x3, 0x5) 2547 #define TIMER1_CC2_PA0 SILABS_DBUS_TIMER1_CC2(0x0, 0x0) 2548 #define TIMER1_CC2_PA1 SILABS_DBUS_TIMER1_CC2(0x0, 0x1) 2549 #define TIMER1_CC2_PA2 SILABS_DBUS_TIMER1_CC2(0x0, 0x2) 2550 #define TIMER1_CC2_PA3 SILABS_DBUS_TIMER1_CC2(0x0, 0x3) 2551 #define TIMER1_CC2_PA4 SILABS_DBUS_TIMER1_CC2(0x0, 0x4) 2552 #define TIMER1_CC2_PA5 SILABS_DBUS_TIMER1_CC2(0x0, 0x5) 2553 #define TIMER1_CC2_PA6 SILABS_DBUS_TIMER1_CC2(0x0, 0x6) 2554 #define TIMER1_CC2_PA7 SILABS_DBUS_TIMER1_CC2(0x0, 0x7) 2555 #define TIMER1_CC2_PA8 SILABS_DBUS_TIMER1_CC2(0x0, 0x8) 2556 #define TIMER1_CC2_PA9 SILABS_DBUS_TIMER1_CC2(0x0, 0x9) 2557 #define TIMER1_CC2_PA10 SILABS_DBUS_TIMER1_CC2(0x0, 0xa) 2558 #define TIMER1_CC2_PB0 SILABS_DBUS_TIMER1_CC2(0x1, 0x0) 2559 #define TIMER1_CC2_PB1 SILABS_DBUS_TIMER1_CC2(0x1, 0x1) 2560 #define TIMER1_CC2_PB2 SILABS_DBUS_TIMER1_CC2(0x1, 0x2) 2561 #define TIMER1_CC2_PB3 SILABS_DBUS_TIMER1_CC2(0x1, 0x3) 2562 #define TIMER1_CC2_PB4 SILABS_DBUS_TIMER1_CC2(0x1, 0x4) 2563 #define TIMER1_CC2_PB5 SILABS_DBUS_TIMER1_CC2(0x1, 0x5) 2564 #define TIMER1_CC2_PB6 SILABS_DBUS_TIMER1_CC2(0x1, 0x6) 2565 #define TIMER1_CC2_PC0 SILABS_DBUS_TIMER1_CC2(0x2, 0x0) 2566 #define TIMER1_CC2_PC1 SILABS_DBUS_TIMER1_CC2(0x2, 0x1) 2567 #define TIMER1_CC2_PC2 SILABS_DBUS_TIMER1_CC2(0x2, 0x2) 2568 #define TIMER1_CC2_PC3 SILABS_DBUS_TIMER1_CC2(0x2, 0x3) 2569 #define TIMER1_CC2_PC4 SILABS_DBUS_TIMER1_CC2(0x2, 0x4) 2570 #define TIMER1_CC2_PC5 SILABS_DBUS_TIMER1_CC2(0x2, 0x5) 2571 #define TIMER1_CC2_PC6 SILABS_DBUS_TIMER1_CC2(0x2, 0x6) 2572 #define TIMER1_CC2_PC7 SILABS_DBUS_TIMER1_CC2(0x2, 0x7) 2573 #define TIMER1_CC2_PC8 SILABS_DBUS_TIMER1_CC2(0x2, 0x8) 2574 #define TIMER1_CC2_PC9 SILABS_DBUS_TIMER1_CC2(0x2, 0x9) 2575 #define TIMER1_CC2_PD0 SILABS_DBUS_TIMER1_CC2(0x3, 0x0) 2576 #define TIMER1_CC2_PD1 SILABS_DBUS_TIMER1_CC2(0x3, 0x1) 2577 #define TIMER1_CC2_PD2 SILABS_DBUS_TIMER1_CC2(0x3, 0x2) 2578 #define TIMER1_CC2_PD3 SILABS_DBUS_TIMER1_CC2(0x3, 0x3) 2579 #define TIMER1_CC2_PD4 SILABS_DBUS_TIMER1_CC2(0x3, 0x4) 2580 #define TIMER1_CC2_PD5 SILABS_DBUS_TIMER1_CC2(0x3, 0x5) 2581 #define TIMER1_CDTI0_PA0 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x0) 2582 #define TIMER1_CDTI0_PA1 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x1) 2583 #define TIMER1_CDTI0_PA2 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x2) 2584 #define TIMER1_CDTI0_PA3 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x3) 2585 #define TIMER1_CDTI0_PA4 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x4) 2586 #define TIMER1_CDTI0_PA5 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x5) 2587 #define TIMER1_CDTI0_PA6 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x6) 2588 #define TIMER1_CDTI0_PA7 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x7) 2589 #define TIMER1_CDTI0_PA8 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x8) 2590 #define TIMER1_CDTI0_PA9 SILABS_DBUS_TIMER1_CDTI0(0x0, 0x9) 2591 #define TIMER1_CDTI0_PA10 SILABS_DBUS_TIMER1_CDTI0(0x0, 0xa) 2592 #define TIMER1_CDTI0_PB0 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x0) 2593 #define TIMER1_CDTI0_PB1 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x1) 2594 #define TIMER1_CDTI0_PB2 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x2) 2595 #define TIMER1_CDTI0_PB3 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x3) 2596 #define TIMER1_CDTI0_PB4 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x4) 2597 #define TIMER1_CDTI0_PB5 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x5) 2598 #define TIMER1_CDTI0_PB6 SILABS_DBUS_TIMER1_CDTI0(0x1, 0x6) 2599 #define TIMER1_CDTI0_PC0 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x0) 2600 #define TIMER1_CDTI0_PC1 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x1) 2601 #define TIMER1_CDTI0_PC2 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x2) 2602 #define TIMER1_CDTI0_PC3 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x3) 2603 #define TIMER1_CDTI0_PC4 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x4) 2604 #define TIMER1_CDTI0_PC5 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x5) 2605 #define TIMER1_CDTI0_PC6 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x6) 2606 #define TIMER1_CDTI0_PC7 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x7) 2607 #define TIMER1_CDTI0_PC8 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x8) 2608 #define TIMER1_CDTI0_PC9 SILABS_DBUS_TIMER1_CDTI0(0x2, 0x9) 2609 #define TIMER1_CDTI0_PD0 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x0) 2610 #define TIMER1_CDTI0_PD1 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x1) 2611 #define TIMER1_CDTI0_PD2 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x2) 2612 #define TIMER1_CDTI0_PD3 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x3) 2613 #define TIMER1_CDTI0_PD4 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x4) 2614 #define TIMER1_CDTI0_PD5 SILABS_DBUS_TIMER1_CDTI0(0x3, 0x5) 2615 #define TIMER1_CDTI1_PA0 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x0) 2616 #define TIMER1_CDTI1_PA1 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x1) 2617 #define TIMER1_CDTI1_PA2 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x2) 2618 #define TIMER1_CDTI1_PA3 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x3) 2619 #define TIMER1_CDTI1_PA4 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x4) 2620 #define TIMER1_CDTI1_PA5 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x5) 2621 #define TIMER1_CDTI1_PA6 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x6) 2622 #define TIMER1_CDTI1_PA7 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x7) 2623 #define TIMER1_CDTI1_PA8 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x8) 2624 #define TIMER1_CDTI1_PA9 SILABS_DBUS_TIMER1_CDTI1(0x0, 0x9) 2625 #define TIMER1_CDTI1_PA10 SILABS_DBUS_TIMER1_CDTI1(0x0, 0xa) 2626 #define TIMER1_CDTI1_PB0 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x0) 2627 #define TIMER1_CDTI1_PB1 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x1) 2628 #define TIMER1_CDTI1_PB2 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x2) 2629 #define TIMER1_CDTI1_PB3 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x3) 2630 #define TIMER1_CDTI1_PB4 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x4) 2631 #define TIMER1_CDTI1_PB5 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x5) 2632 #define TIMER1_CDTI1_PB6 SILABS_DBUS_TIMER1_CDTI1(0x1, 0x6) 2633 #define TIMER1_CDTI1_PC0 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x0) 2634 #define TIMER1_CDTI1_PC1 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x1) 2635 #define TIMER1_CDTI1_PC2 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x2) 2636 #define TIMER1_CDTI1_PC3 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x3) 2637 #define TIMER1_CDTI1_PC4 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x4) 2638 #define TIMER1_CDTI1_PC5 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x5) 2639 #define TIMER1_CDTI1_PC6 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x6) 2640 #define TIMER1_CDTI1_PC7 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x7) 2641 #define TIMER1_CDTI1_PC8 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x8) 2642 #define TIMER1_CDTI1_PC9 SILABS_DBUS_TIMER1_CDTI1(0x2, 0x9) 2643 #define TIMER1_CDTI1_PD0 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x0) 2644 #define TIMER1_CDTI1_PD1 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x1) 2645 #define TIMER1_CDTI1_PD2 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x2) 2646 #define TIMER1_CDTI1_PD3 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x3) 2647 #define TIMER1_CDTI1_PD4 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x4) 2648 #define TIMER1_CDTI1_PD5 SILABS_DBUS_TIMER1_CDTI1(0x3, 0x5) 2649 #define TIMER1_CDTI2_PA0 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x0) 2650 #define TIMER1_CDTI2_PA1 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x1) 2651 #define TIMER1_CDTI2_PA2 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x2) 2652 #define TIMER1_CDTI2_PA3 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x3) 2653 #define TIMER1_CDTI2_PA4 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x4) 2654 #define TIMER1_CDTI2_PA5 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x5) 2655 #define TIMER1_CDTI2_PA6 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x6) 2656 #define TIMER1_CDTI2_PA7 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x7) 2657 #define TIMER1_CDTI2_PA8 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x8) 2658 #define TIMER1_CDTI2_PA9 SILABS_DBUS_TIMER1_CDTI2(0x0, 0x9) 2659 #define TIMER1_CDTI2_PA10 SILABS_DBUS_TIMER1_CDTI2(0x0, 0xa) 2660 #define TIMER1_CDTI2_PB0 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x0) 2661 #define TIMER1_CDTI2_PB1 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x1) 2662 #define TIMER1_CDTI2_PB2 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x2) 2663 #define TIMER1_CDTI2_PB3 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x3) 2664 #define TIMER1_CDTI2_PB4 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x4) 2665 #define TIMER1_CDTI2_PB5 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x5) 2666 #define TIMER1_CDTI2_PB6 SILABS_DBUS_TIMER1_CDTI2(0x1, 0x6) 2667 #define TIMER1_CDTI2_PC0 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x0) 2668 #define TIMER1_CDTI2_PC1 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x1) 2669 #define TIMER1_CDTI2_PC2 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x2) 2670 #define TIMER1_CDTI2_PC3 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x3) 2671 #define TIMER1_CDTI2_PC4 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x4) 2672 #define TIMER1_CDTI2_PC5 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x5) 2673 #define TIMER1_CDTI2_PC6 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x6) 2674 #define TIMER1_CDTI2_PC7 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x7) 2675 #define TIMER1_CDTI2_PC8 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x8) 2676 #define TIMER1_CDTI2_PC9 SILABS_DBUS_TIMER1_CDTI2(0x2, 0x9) 2677 #define TIMER1_CDTI2_PD0 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x0) 2678 #define TIMER1_CDTI2_PD1 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x1) 2679 #define TIMER1_CDTI2_PD2 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x2) 2680 #define TIMER1_CDTI2_PD3 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x3) 2681 #define TIMER1_CDTI2_PD4 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x4) 2682 #define TIMER1_CDTI2_PD5 SILABS_DBUS_TIMER1_CDTI2(0x3, 0x5) 2683 2684 #define TIMER2_CC0_PA0 SILABS_DBUS_TIMER2_CC0(0x0, 0x0) 2685 #define TIMER2_CC0_PA1 SILABS_DBUS_TIMER2_CC0(0x0, 0x1) 2686 #define TIMER2_CC0_PA2 SILABS_DBUS_TIMER2_CC0(0x0, 0x2) 2687 #define TIMER2_CC0_PA3 SILABS_DBUS_TIMER2_CC0(0x0, 0x3) 2688 #define TIMER2_CC0_PA4 SILABS_DBUS_TIMER2_CC0(0x0, 0x4) 2689 #define TIMER2_CC0_PA5 SILABS_DBUS_TIMER2_CC0(0x0, 0x5) 2690 #define TIMER2_CC0_PA6 SILABS_DBUS_TIMER2_CC0(0x0, 0x6) 2691 #define TIMER2_CC0_PA7 SILABS_DBUS_TIMER2_CC0(0x0, 0x7) 2692 #define TIMER2_CC0_PA8 SILABS_DBUS_TIMER2_CC0(0x0, 0x8) 2693 #define TIMER2_CC0_PA9 SILABS_DBUS_TIMER2_CC0(0x0, 0x9) 2694 #define TIMER2_CC0_PA10 SILABS_DBUS_TIMER2_CC0(0x0, 0xa) 2695 #define TIMER2_CC0_PB0 SILABS_DBUS_TIMER2_CC0(0x1, 0x0) 2696 #define TIMER2_CC0_PB1 SILABS_DBUS_TIMER2_CC0(0x1, 0x1) 2697 #define TIMER2_CC0_PB2 SILABS_DBUS_TIMER2_CC0(0x1, 0x2) 2698 #define TIMER2_CC0_PB3 SILABS_DBUS_TIMER2_CC0(0x1, 0x3) 2699 #define TIMER2_CC0_PB4 SILABS_DBUS_TIMER2_CC0(0x1, 0x4) 2700 #define TIMER2_CC0_PB5 SILABS_DBUS_TIMER2_CC0(0x1, 0x5) 2701 #define TIMER2_CC0_PB6 SILABS_DBUS_TIMER2_CC0(0x1, 0x6) 2702 #define TIMER2_CC1_PA0 SILABS_DBUS_TIMER2_CC1(0x0, 0x0) 2703 #define TIMER2_CC1_PA1 SILABS_DBUS_TIMER2_CC1(0x0, 0x1) 2704 #define TIMER2_CC1_PA2 SILABS_DBUS_TIMER2_CC1(0x0, 0x2) 2705 #define TIMER2_CC1_PA3 SILABS_DBUS_TIMER2_CC1(0x0, 0x3) 2706 #define TIMER2_CC1_PA4 SILABS_DBUS_TIMER2_CC1(0x0, 0x4) 2707 #define TIMER2_CC1_PA5 SILABS_DBUS_TIMER2_CC1(0x0, 0x5) 2708 #define TIMER2_CC1_PA6 SILABS_DBUS_TIMER2_CC1(0x0, 0x6) 2709 #define TIMER2_CC1_PA7 SILABS_DBUS_TIMER2_CC1(0x0, 0x7) 2710 #define TIMER2_CC1_PA8 SILABS_DBUS_TIMER2_CC1(0x0, 0x8) 2711 #define TIMER2_CC1_PA9 SILABS_DBUS_TIMER2_CC1(0x0, 0x9) 2712 #define TIMER2_CC1_PA10 SILABS_DBUS_TIMER2_CC1(0x0, 0xa) 2713 #define TIMER2_CC1_PB0 SILABS_DBUS_TIMER2_CC1(0x1, 0x0) 2714 #define TIMER2_CC1_PB1 SILABS_DBUS_TIMER2_CC1(0x1, 0x1) 2715 #define TIMER2_CC1_PB2 SILABS_DBUS_TIMER2_CC1(0x1, 0x2) 2716 #define TIMER2_CC1_PB3 SILABS_DBUS_TIMER2_CC1(0x1, 0x3) 2717 #define TIMER2_CC1_PB4 SILABS_DBUS_TIMER2_CC1(0x1, 0x4) 2718 #define TIMER2_CC1_PB5 SILABS_DBUS_TIMER2_CC1(0x1, 0x5) 2719 #define TIMER2_CC1_PB6 SILABS_DBUS_TIMER2_CC1(0x1, 0x6) 2720 #define TIMER2_CC2_PA0 SILABS_DBUS_TIMER2_CC2(0x0, 0x0) 2721 #define TIMER2_CC2_PA1 SILABS_DBUS_TIMER2_CC2(0x0, 0x1) 2722 #define TIMER2_CC2_PA2 SILABS_DBUS_TIMER2_CC2(0x0, 0x2) 2723 #define TIMER2_CC2_PA3 SILABS_DBUS_TIMER2_CC2(0x0, 0x3) 2724 #define TIMER2_CC2_PA4 SILABS_DBUS_TIMER2_CC2(0x0, 0x4) 2725 #define TIMER2_CC2_PA5 SILABS_DBUS_TIMER2_CC2(0x0, 0x5) 2726 #define TIMER2_CC2_PA6 SILABS_DBUS_TIMER2_CC2(0x0, 0x6) 2727 #define TIMER2_CC2_PA7 SILABS_DBUS_TIMER2_CC2(0x0, 0x7) 2728 #define TIMER2_CC2_PA8 SILABS_DBUS_TIMER2_CC2(0x0, 0x8) 2729 #define TIMER2_CC2_PA9 SILABS_DBUS_TIMER2_CC2(0x0, 0x9) 2730 #define TIMER2_CC2_PA10 SILABS_DBUS_TIMER2_CC2(0x0, 0xa) 2731 #define TIMER2_CC2_PB0 SILABS_DBUS_TIMER2_CC2(0x1, 0x0) 2732 #define TIMER2_CC2_PB1 SILABS_DBUS_TIMER2_CC2(0x1, 0x1) 2733 #define TIMER2_CC2_PB2 SILABS_DBUS_TIMER2_CC2(0x1, 0x2) 2734 #define TIMER2_CC2_PB3 SILABS_DBUS_TIMER2_CC2(0x1, 0x3) 2735 #define TIMER2_CC2_PB4 SILABS_DBUS_TIMER2_CC2(0x1, 0x4) 2736 #define TIMER2_CC2_PB5 SILABS_DBUS_TIMER2_CC2(0x1, 0x5) 2737 #define TIMER2_CC2_PB6 SILABS_DBUS_TIMER2_CC2(0x1, 0x6) 2738 #define TIMER2_CDTI0_PA0 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x0) 2739 #define TIMER2_CDTI0_PA1 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x1) 2740 #define TIMER2_CDTI0_PA2 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x2) 2741 #define TIMER2_CDTI0_PA3 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x3) 2742 #define TIMER2_CDTI0_PA4 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x4) 2743 #define TIMER2_CDTI0_PA5 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x5) 2744 #define TIMER2_CDTI0_PA6 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x6) 2745 #define TIMER2_CDTI0_PA7 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x7) 2746 #define TIMER2_CDTI0_PA8 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x8) 2747 #define TIMER2_CDTI0_PA9 SILABS_DBUS_TIMER2_CDTI0(0x0, 0x9) 2748 #define TIMER2_CDTI0_PA10 SILABS_DBUS_TIMER2_CDTI0(0x0, 0xa) 2749 #define TIMER2_CDTI0_PB0 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x0) 2750 #define TIMER2_CDTI0_PB1 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x1) 2751 #define TIMER2_CDTI0_PB2 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x2) 2752 #define TIMER2_CDTI0_PB3 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x3) 2753 #define TIMER2_CDTI0_PB4 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x4) 2754 #define TIMER2_CDTI0_PB5 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x5) 2755 #define TIMER2_CDTI0_PB6 SILABS_DBUS_TIMER2_CDTI0(0x1, 0x6) 2756 #define TIMER2_CDTI1_PA0 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x0) 2757 #define TIMER2_CDTI1_PA1 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x1) 2758 #define TIMER2_CDTI1_PA2 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x2) 2759 #define TIMER2_CDTI1_PA3 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x3) 2760 #define TIMER2_CDTI1_PA4 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x4) 2761 #define TIMER2_CDTI1_PA5 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x5) 2762 #define TIMER2_CDTI1_PA6 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x6) 2763 #define TIMER2_CDTI1_PA7 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x7) 2764 #define TIMER2_CDTI1_PA8 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x8) 2765 #define TIMER2_CDTI1_PA9 SILABS_DBUS_TIMER2_CDTI1(0x0, 0x9) 2766 #define TIMER2_CDTI1_PA10 SILABS_DBUS_TIMER2_CDTI1(0x0, 0xa) 2767 #define TIMER2_CDTI1_PB0 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x0) 2768 #define TIMER2_CDTI1_PB1 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x1) 2769 #define TIMER2_CDTI1_PB2 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x2) 2770 #define TIMER2_CDTI1_PB3 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x3) 2771 #define TIMER2_CDTI1_PB4 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x4) 2772 #define TIMER2_CDTI1_PB5 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x5) 2773 #define TIMER2_CDTI1_PB6 SILABS_DBUS_TIMER2_CDTI1(0x1, 0x6) 2774 #define TIMER2_CDTI2_PA0 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x0) 2775 #define TIMER2_CDTI2_PA1 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x1) 2776 #define TIMER2_CDTI2_PA2 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x2) 2777 #define TIMER2_CDTI2_PA3 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x3) 2778 #define TIMER2_CDTI2_PA4 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x4) 2779 #define TIMER2_CDTI2_PA5 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x5) 2780 #define TIMER2_CDTI2_PA6 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x6) 2781 #define TIMER2_CDTI2_PA7 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x7) 2782 #define TIMER2_CDTI2_PA8 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x8) 2783 #define TIMER2_CDTI2_PA9 SILABS_DBUS_TIMER2_CDTI2(0x0, 0x9) 2784 #define TIMER2_CDTI2_PA10 SILABS_DBUS_TIMER2_CDTI2(0x0, 0xa) 2785 #define TIMER2_CDTI2_PB0 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x0) 2786 #define TIMER2_CDTI2_PB1 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x1) 2787 #define TIMER2_CDTI2_PB2 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x2) 2788 #define TIMER2_CDTI2_PB3 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x3) 2789 #define TIMER2_CDTI2_PB4 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x4) 2790 #define TIMER2_CDTI2_PB5 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x5) 2791 #define TIMER2_CDTI2_PB6 SILABS_DBUS_TIMER2_CDTI2(0x1, 0x6) 2792 2793 #define TIMER3_CC0_PC0 SILABS_DBUS_TIMER3_CC0(0x2, 0x0) 2794 #define TIMER3_CC0_PC1 SILABS_DBUS_TIMER3_CC0(0x2, 0x1) 2795 #define TIMER3_CC0_PC2 SILABS_DBUS_TIMER3_CC0(0x2, 0x2) 2796 #define TIMER3_CC0_PC3 SILABS_DBUS_TIMER3_CC0(0x2, 0x3) 2797 #define TIMER3_CC0_PC4 SILABS_DBUS_TIMER3_CC0(0x2, 0x4) 2798 #define TIMER3_CC0_PC5 SILABS_DBUS_TIMER3_CC0(0x2, 0x5) 2799 #define TIMER3_CC0_PC6 SILABS_DBUS_TIMER3_CC0(0x2, 0x6) 2800 #define TIMER3_CC0_PC7 SILABS_DBUS_TIMER3_CC0(0x2, 0x7) 2801 #define TIMER3_CC0_PC8 SILABS_DBUS_TIMER3_CC0(0x2, 0x8) 2802 #define TIMER3_CC0_PC9 SILABS_DBUS_TIMER3_CC0(0x2, 0x9) 2803 #define TIMER3_CC0_PD0 SILABS_DBUS_TIMER3_CC0(0x3, 0x0) 2804 #define TIMER3_CC0_PD1 SILABS_DBUS_TIMER3_CC0(0x3, 0x1) 2805 #define TIMER3_CC0_PD2 SILABS_DBUS_TIMER3_CC0(0x3, 0x2) 2806 #define TIMER3_CC0_PD3 SILABS_DBUS_TIMER3_CC0(0x3, 0x3) 2807 #define TIMER3_CC0_PD4 SILABS_DBUS_TIMER3_CC0(0x3, 0x4) 2808 #define TIMER3_CC0_PD5 SILABS_DBUS_TIMER3_CC0(0x3, 0x5) 2809 #define TIMER3_CC1_PC0 SILABS_DBUS_TIMER3_CC1(0x2, 0x0) 2810 #define TIMER3_CC1_PC1 SILABS_DBUS_TIMER3_CC1(0x2, 0x1) 2811 #define TIMER3_CC1_PC2 SILABS_DBUS_TIMER3_CC1(0x2, 0x2) 2812 #define TIMER3_CC1_PC3 SILABS_DBUS_TIMER3_CC1(0x2, 0x3) 2813 #define TIMER3_CC1_PC4 SILABS_DBUS_TIMER3_CC1(0x2, 0x4) 2814 #define TIMER3_CC1_PC5 SILABS_DBUS_TIMER3_CC1(0x2, 0x5) 2815 #define TIMER3_CC1_PC6 SILABS_DBUS_TIMER3_CC1(0x2, 0x6) 2816 #define TIMER3_CC1_PC7 SILABS_DBUS_TIMER3_CC1(0x2, 0x7) 2817 #define TIMER3_CC1_PC8 SILABS_DBUS_TIMER3_CC1(0x2, 0x8) 2818 #define TIMER3_CC1_PC9 SILABS_DBUS_TIMER3_CC1(0x2, 0x9) 2819 #define TIMER3_CC1_PD0 SILABS_DBUS_TIMER3_CC1(0x3, 0x0) 2820 #define TIMER3_CC1_PD1 SILABS_DBUS_TIMER3_CC1(0x3, 0x1) 2821 #define TIMER3_CC1_PD2 SILABS_DBUS_TIMER3_CC1(0x3, 0x2) 2822 #define TIMER3_CC1_PD3 SILABS_DBUS_TIMER3_CC1(0x3, 0x3) 2823 #define TIMER3_CC1_PD4 SILABS_DBUS_TIMER3_CC1(0x3, 0x4) 2824 #define TIMER3_CC1_PD5 SILABS_DBUS_TIMER3_CC1(0x3, 0x5) 2825 #define TIMER3_CC2_PC0 SILABS_DBUS_TIMER3_CC2(0x2, 0x0) 2826 #define TIMER3_CC2_PC1 SILABS_DBUS_TIMER3_CC2(0x2, 0x1) 2827 #define TIMER3_CC2_PC2 SILABS_DBUS_TIMER3_CC2(0x2, 0x2) 2828 #define TIMER3_CC2_PC3 SILABS_DBUS_TIMER3_CC2(0x2, 0x3) 2829 #define TIMER3_CC2_PC4 SILABS_DBUS_TIMER3_CC2(0x2, 0x4) 2830 #define TIMER3_CC2_PC5 SILABS_DBUS_TIMER3_CC2(0x2, 0x5) 2831 #define TIMER3_CC2_PC6 SILABS_DBUS_TIMER3_CC2(0x2, 0x6) 2832 #define TIMER3_CC2_PC7 SILABS_DBUS_TIMER3_CC2(0x2, 0x7) 2833 #define TIMER3_CC2_PC8 SILABS_DBUS_TIMER3_CC2(0x2, 0x8) 2834 #define TIMER3_CC2_PC9 SILABS_DBUS_TIMER3_CC2(0x2, 0x9) 2835 #define TIMER3_CC2_PD0 SILABS_DBUS_TIMER3_CC2(0x3, 0x0) 2836 #define TIMER3_CC2_PD1 SILABS_DBUS_TIMER3_CC2(0x3, 0x1) 2837 #define TIMER3_CC2_PD2 SILABS_DBUS_TIMER3_CC2(0x3, 0x2) 2838 #define TIMER3_CC2_PD3 SILABS_DBUS_TIMER3_CC2(0x3, 0x3) 2839 #define TIMER3_CC2_PD4 SILABS_DBUS_TIMER3_CC2(0x3, 0x4) 2840 #define TIMER3_CC2_PD5 SILABS_DBUS_TIMER3_CC2(0x3, 0x5) 2841 #define TIMER3_CDTI0_PC0 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x0) 2842 #define TIMER3_CDTI0_PC1 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x1) 2843 #define TIMER3_CDTI0_PC2 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x2) 2844 #define TIMER3_CDTI0_PC3 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x3) 2845 #define TIMER3_CDTI0_PC4 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x4) 2846 #define TIMER3_CDTI0_PC5 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x5) 2847 #define TIMER3_CDTI0_PC6 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x6) 2848 #define TIMER3_CDTI0_PC7 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x7) 2849 #define TIMER3_CDTI0_PC8 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x8) 2850 #define TIMER3_CDTI0_PC9 SILABS_DBUS_TIMER3_CDTI0(0x2, 0x9) 2851 #define TIMER3_CDTI0_PD0 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x0) 2852 #define TIMER3_CDTI0_PD1 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x1) 2853 #define TIMER3_CDTI0_PD2 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x2) 2854 #define TIMER3_CDTI0_PD3 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x3) 2855 #define TIMER3_CDTI0_PD4 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x4) 2856 #define TIMER3_CDTI0_PD5 SILABS_DBUS_TIMER3_CDTI0(0x3, 0x5) 2857 #define TIMER3_CDTI1_PC0 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x0) 2858 #define TIMER3_CDTI1_PC1 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x1) 2859 #define TIMER3_CDTI1_PC2 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x2) 2860 #define TIMER3_CDTI1_PC3 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x3) 2861 #define TIMER3_CDTI1_PC4 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x4) 2862 #define TIMER3_CDTI1_PC5 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x5) 2863 #define TIMER3_CDTI1_PC6 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x6) 2864 #define TIMER3_CDTI1_PC7 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x7) 2865 #define TIMER3_CDTI1_PC8 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x8) 2866 #define TIMER3_CDTI1_PC9 SILABS_DBUS_TIMER3_CDTI1(0x2, 0x9) 2867 #define TIMER3_CDTI1_PD0 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x0) 2868 #define TIMER3_CDTI1_PD1 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x1) 2869 #define TIMER3_CDTI1_PD2 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x2) 2870 #define TIMER3_CDTI1_PD3 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x3) 2871 #define TIMER3_CDTI1_PD4 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x4) 2872 #define TIMER3_CDTI1_PD5 SILABS_DBUS_TIMER3_CDTI1(0x3, 0x5) 2873 #define TIMER3_CDTI2_PC0 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x0) 2874 #define TIMER3_CDTI2_PC1 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x1) 2875 #define TIMER3_CDTI2_PC2 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x2) 2876 #define TIMER3_CDTI2_PC3 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x3) 2877 #define TIMER3_CDTI2_PC4 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x4) 2878 #define TIMER3_CDTI2_PC5 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x5) 2879 #define TIMER3_CDTI2_PC6 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x6) 2880 #define TIMER3_CDTI2_PC7 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x7) 2881 #define TIMER3_CDTI2_PC8 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x8) 2882 #define TIMER3_CDTI2_PC9 SILABS_DBUS_TIMER3_CDTI2(0x2, 0x9) 2883 #define TIMER3_CDTI2_PD0 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x0) 2884 #define TIMER3_CDTI2_PD1 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x1) 2885 #define TIMER3_CDTI2_PD2 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x2) 2886 #define TIMER3_CDTI2_PD3 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x3) 2887 #define TIMER3_CDTI2_PD4 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x4) 2888 #define TIMER3_CDTI2_PD5 SILABS_DBUS_TIMER3_CDTI2(0x3, 0x5) 2889 2890 #define TIMER4_CC0_PA0 SILABS_DBUS_TIMER4_CC0(0x0, 0x0) 2891 #define TIMER4_CC0_PA1 SILABS_DBUS_TIMER4_CC0(0x0, 0x1) 2892 #define TIMER4_CC0_PA2 SILABS_DBUS_TIMER4_CC0(0x0, 0x2) 2893 #define TIMER4_CC0_PA3 SILABS_DBUS_TIMER4_CC0(0x0, 0x3) 2894 #define TIMER4_CC0_PA4 SILABS_DBUS_TIMER4_CC0(0x0, 0x4) 2895 #define TIMER4_CC0_PA5 SILABS_DBUS_TIMER4_CC0(0x0, 0x5) 2896 #define TIMER4_CC0_PA6 SILABS_DBUS_TIMER4_CC0(0x0, 0x6) 2897 #define TIMER4_CC0_PA7 SILABS_DBUS_TIMER4_CC0(0x0, 0x7) 2898 #define TIMER4_CC0_PA8 SILABS_DBUS_TIMER4_CC0(0x0, 0x8) 2899 #define TIMER4_CC0_PA9 SILABS_DBUS_TIMER4_CC0(0x0, 0x9) 2900 #define TIMER4_CC0_PA10 SILABS_DBUS_TIMER4_CC0(0x0, 0xa) 2901 #define TIMER4_CC0_PB0 SILABS_DBUS_TIMER4_CC0(0x1, 0x0) 2902 #define TIMER4_CC0_PB1 SILABS_DBUS_TIMER4_CC0(0x1, 0x1) 2903 #define TIMER4_CC0_PB2 SILABS_DBUS_TIMER4_CC0(0x1, 0x2) 2904 #define TIMER4_CC0_PB3 SILABS_DBUS_TIMER4_CC0(0x1, 0x3) 2905 #define TIMER4_CC0_PB4 SILABS_DBUS_TIMER4_CC0(0x1, 0x4) 2906 #define TIMER4_CC0_PB5 SILABS_DBUS_TIMER4_CC0(0x1, 0x5) 2907 #define TIMER4_CC0_PB6 SILABS_DBUS_TIMER4_CC0(0x1, 0x6) 2908 #define TIMER4_CC1_PA0 SILABS_DBUS_TIMER4_CC1(0x0, 0x0) 2909 #define TIMER4_CC1_PA1 SILABS_DBUS_TIMER4_CC1(0x0, 0x1) 2910 #define TIMER4_CC1_PA2 SILABS_DBUS_TIMER4_CC1(0x0, 0x2) 2911 #define TIMER4_CC1_PA3 SILABS_DBUS_TIMER4_CC1(0x0, 0x3) 2912 #define TIMER4_CC1_PA4 SILABS_DBUS_TIMER4_CC1(0x0, 0x4) 2913 #define TIMER4_CC1_PA5 SILABS_DBUS_TIMER4_CC1(0x0, 0x5) 2914 #define TIMER4_CC1_PA6 SILABS_DBUS_TIMER4_CC1(0x0, 0x6) 2915 #define TIMER4_CC1_PA7 SILABS_DBUS_TIMER4_CC1(0x0, 0x7) 2916 #define TIMER4_CC1_PA8 SILABS_DBUS_TIMER4_CC1(0x0, 0x8) 2917 #define TIMER4_CC1_PA9 SILABS_DBUS_TIMER4_CC1(0x0, 0x9) 2918 #define TIMER4_CC1_PA10 SILABS_DBUS_TIMER4_CC1(0x0, 0xa) 2919 #define TIMER4_CC1_PB0 SILABS_DBUS_TIMER4_CC1(0x1, 0x0) 2920 #define TIMER4_CC1_PB1 SILABS_DBUS_TIMER4_CC1(0x1, 0x1) 2921 #define TIMER4_CC1_PB2 SILABS_DBUS_TIMER4_CC1(0x1, 0x2) 2922 #define TIMER4_CC1_PB3 SILABS_DBUS_TIMER4_CC1(0x1, 0x3) 2923 #define TIMER4_CC1_PB4 SILABS_DBUS_TIMER4_CC1(0x1, 0x4) 2924 #define TIMER4_CC1_PB5 SILABS_DBUS_TIMER4_CC1(0x1, 0x5) 2925 #define TIMER4_CC1_PB6 SILABS_DBUS_TIMER4_CC1(0x1, 0x6) 2926 #define TIMER4_CC2_PA0 SILABS_DBUS_TIMER4_CC2(0x0, 0x0) 2927 #define TIMER4_CC2_PA1 SILABS_DBUS_TIMER4_CC2(0x0, 0x1) 2928 #define TIMER4_CC2_PA2 SILABS_DBUS_TIMER4_CC2(0x0, 0x2) 2929 #define TIMER4_CC2_PA3 SILABS_DBUS_TIMER4_CC2(0x0, 0x3) 2930 #define TIMER4_CC2_PA4 SILABS_DBUS_TIMER4_CC2(0x0, 0x4) 2931 #define TIMER4_CC2_PA5 SILABS_DBUS_TIMER4_CC2(0x0, 0x5) 2932 #define TIMER4_CC2_PA6 SILABS_DBUS_TIMER4_CC2(0x0, 0x6) 2933 #define TIMER4_CC2_PA7 SILABS_DBUS_TIMER4_CC2(0x0, 0x7) 2934 #define TIMER4_CC2_PA8 SILABS_DBUS_TIMER4_CC2(0x0, 0x8) 2935 #define TIMER4_CC2_PA9 SILABS_DBUS_TIMER4_CC2(0x0, 0x9) 2936 #define TIMER4_CC2_PA10 SILABS_DBUS_TIMER4_CC2(0x0, 0xa) 2937 #define TIMER4_CC2_PB0 SILABS_DBUS_TIMER4_CC2(0x1, 0x0) 2938 #define TIMER4_CC2_PB1 SILABS_DBUS_TIMER4_CC2(0x1, 0x1) 2939 #define TIMER4_CC2_PB2 SILABS_DBUS_TIMER4_CC2(0x1, 0x2) 2940 #define TIMER4_CC2_PB3 SILABS_DBUS_TIMER4_CC2(0x1, 0x3) 2941 #define TIMER4_CC2_PB4 SILABS_DBUS_TIMER4_CC2(0x1, 0x4) 2942 #define TIMER4_CC2_PB5 SILABS_DBUS_TIMER4_CC2(0x1, 0x5) 2943 #define TIMER4_CC2_PB6 SILABS_DBUS_TIMER4_CC2(0x1, 0x6) 2944 #define TIMER4_CDTI0_PA0 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x0) 2945 #define TIMER4_CDTI0_PA1 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x1) 2946 #define TIMER4_CDTI0_PA2 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x2) 2947 #define TIMER4_CDTI0_PA3 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x3) 2948 #define TIMER4_CDTI0_PA4 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x4) 2949 #define TIMER4_CDTI0_PA5 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x5) 2950 #define TIMER4_CDTI0_PA6 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x6) 2951 #define TIMER4_CDTI0_PA7 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x7) 2952 #define TIMER4_CDTI0_PA8 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x8) 2953 #define TIMER4_CDTI0_PA9 SILABS_DBUS_TIMER4_CDTI0(0x0, 0x9) 2954 #define TIMER4_CDTI0_PA10 SILABS_DBUS_TIMER4_CDTI0(0x0, 0xa) 2955 #define TIMER4_CDTI0_PB0 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x0) 2956 #define TIMER4_CDTI0_PB1 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x1) 2957 #define TIMER4_CDTI0_PB2 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x2) 2958 #define TIMER4_CDTI0_PB3 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x3) 2959 #define TIMER4_CDTI0_PB4 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x4) 2960 #define TIMER4_CDTI0_PB5 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x5) 2961 #define TIMER4_CDTI0_PB6 SILABS_DBUS_TIMER4_CDTI0(0x1, 0x6) 2962 #define TIMER4_CDTI1_PA0 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x0) 2963 #define TIMER4_CDTI1_PA1 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x1) 2964 #define TIMER4_CDTI1_PA2 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x2) 2965 #define TIMER4_CDTI1_PA3 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x3) 2966 #define TIMER4_CDTI1_PA4 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x4) 2967 #define TIMER4_CDTI1_PA5 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x5) 2968 #define TIMER4_CDTI1_PA6 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x6) 2969 #define TIMER4_CDTI1_PA7 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x7) 2970 #define TIMER4_CDTI1_PA8 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x8) 2971 #define TIMER4_CDTI1_PA9 SILABS_DBUS_TIMER4_CDTI1(0x0, 0x9) 2972 #define TIMER4_CDTI1_PA10 SILABS_DBUS_TIMER4_CDTI1(0x0, 0xa) 2973 #define TIMER4_CDTI1_PB0 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x0) 2974 #define TIMER4_CDTI1_PB1 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x1) 2975 #define TIMER4_CDTI1_PB2 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x2) 2976 #define TIMER4_CDTI1_PB3 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x3) 2977 #define TIMER4_CDTI1_PB4 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x4) 2978 #define TIMER4_CDTI1_PB5 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x5) 2979 #define TIMER4_CDTI1_PB6 SILABS_DBUS_TIMER4_CDTI1(0x1, 0x6) 2980 #define TIMER4_CDTI2_PA0 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x0) 2981 #define TIMER4_CDTI2_PA1 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x1) 2982 #define TIMER4_CDTI2_PA2 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x2) 2983 #define TIMER4_CDTI2_PA3 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x3) 2984 #define TIMER4_CDTI2_PA4 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x4) 2985 #define TIMER4_CDTI2_PA5 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x5) 2986 #define TIMER4_CDTI2_PA6 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x6) 2987 #define TIMER4_CDTI2_PA7 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x7) 2988 #define TIMER4_CDTI2_PA8 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x8) 2989 #define TIMER4_CDTI2_PA9 SILABS_DBUS_TIMER4_CDTI2(0x0, 0x9) 2990 #define TIMER4_CDTI2_PA10 SILABS_DBUS_TIMER4_CDTI2(0x0, 0xa) 2991 #define TIMER4_CDTI2_PB0 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x0) 2992 #define TIMER4_CDTI2_PB1 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x1) 2993 #define TIMER4_CDTI2_PB2 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x2) 2994 #define TIMER4_CDTI2_PB3 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x3) 2995 #define TIMER4_CDTI2_PB4 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x4) 2996 #define TIMER4_CDTI2_PB5 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x5) 2997 #define TIMER4_CDTI2_PB6 SILABS_DBUS_TIMER4_CDTI2(0x1, 0x6) 2998 2999 #define USART0_CS_PA0 SILABS_DBUS_USART0_CS(0x0, 0x0) 3000 #define USART0_CS_PA1 SILABS_DBUS_USART0_CS(0x0, 0x1) 3001 #define USART0_CS_PA2 SILABS_DBUS_USART0_CS(0x0, 0x2) 3002 #define USART0_CS_PA3 SILABS_DBUS_USART0_CS(0x0, 0x3) 3003 #define USART0_CS_PA4 SILABS_DBUS_USART0_CS(0x0, 0x4) 3004 #define USART0_CS_PA5 SILABS_DBUS_USART0_CS(0x0, 0x5) 3005 #define USART0_CS_PA6 SILABS_DBUS_USART0_CS(0x0, 0x6) 3006 #define USART0_CS_PA7 SILABS_DBUS_USART0_CS(0x0, 0x7) 3007 #define USART0_CS_PA8 SILABS_DBUS_USART0_CS(0x0, 0x8) 3008 #define USART0_CS_PA9 SILABS_DBUS_USART0_CS(0x0, 0x9) 3009 #define USART0_CS_PA10 SILABS_DBUS_USART0_CS(0x0, 0xa) 3010 #define USART0_CS_PB0 SILABS_DBUS_USART0_CS(0x1, 0x0) 3011 #define USART0_CS_PB1 SILABS_DBUS_USART0_CS(0x1, 0x1) 3012 #define USART0_CS_PB2 SILABS_DBUS_USART0_CS(0x1, 0x2) 3013 #define USART0_CS_PB3 SILABS_DBUS_USART0_CS(0x1, 0x3) 3014 #define USART0_CS_PB4 SILABS_DBUS_USART0_CS(0x1, 0x4) 3015 #define USART0_CS_PB5 SILABS_DBUS_USART0_CS(0x1, 0x5) 3016 #define USART0_CS_PB6 SILABS_DBUS_USART0_CS(0x1, 0x6) 3017 #define USART0_CS_PC0 SILABS_DBUS_USART0_CS(0x2, 0x0) 3018 #define USART0_CS_PC1 SILABS_DBUS_USART0_CS(0x2, 0x1) 3019 #define USART0_CS_PC2 SILABS_DBUS_USART0_CS(0x2, 0x2) 3020 #define USART0_CS_PC3 SILABS_DBUS_USART0_CS(0x2, 0x3) 3021 #define USART0_CS_PC4 SILABS_DBUS_USART0_CS(0x2, 0x4) 3022 #define USART0_CS_PC5 SILABS_DBUS_USART0_CS(0x2, 0x5) 3023 #define USART0_CS_PC6 SILABS_DBUS_USART0_CS(0x2, 0x6) 3024 #define USART0_CS_PC7 SILABS_DBUS_USART0_CS(0x2, 0x7) 3025 #define USART0_CS_PC8 SILABS_DBUS_USART0_CS(0x2, 0x8) 3026 #define USART0_CS_PC9 SILABS_DBUS_USART0_CS(0x2, 0x9) 3027 #define USART0_CS_PD0 SILABS_DBUS_USART0_CS(0x3, 0x0) 3028 #define USART0_CS_PD1 SILABS_DBUS_USART0_CS(0x3, 0x1) 3029 #define USART0_CS_PD2 SILABS_DBUS_USART0_CS(0x3, 0x2) 3030 #define USART0_CS_PD3 SILABS_DBUS_USART0_CS(0x3, 0x3) 3031 #define USART0_CS_PD4 SILABS_DBUS_USART0_CS(0x3, 0x4) 3032 #define USART0_CS_PD5 SILABS_DBUS_USART0_CS(0x3, 0x5) 3033 #define USART0_RTS_PA0 SILABS_DBUS_USART0_RTS(0x0, 0x0) 3034 #define USART0_RTS_PA1 SILABS_DBUS_USART0_RTS(0x0, 0x1) 3035 #define USART0_RTS_PA2 SILABS_DBUS_USART0_RTS(0x0, 0x2) 3036 #define USART0_RTS_PA3 SILABS_DBUS_USART0_RTS(0x0, 0x3) 3037 #define USART0_RTS_PA4 SILABS_DBUS_USART0_RTS(0x0, 0x4) 3038 #define USART0_RTS_PA5 SILABS_DBUS_USART0_RTS(0x0, 0x5) 3039 #define USART0_RTS_PA6 SILABS_DBUS_USART0_RTS(0x0, 0x6) 3040 #define USART0_RTS_PA7 SILABS_DBUS_USART0_RTS(0x0, 0x7) 3041 #define USART0_RTS_PA8 SILABS_DBUS_USART0_RTS(0x0, 0x8) 3042 #define USART0_RTS_PA9 SILABS_DBUS_USART0_RTS(0x0, 0x9) 3043 #define USART0_RTS_PA10 SILABS_DBUS_USART0_RTS(0x0, 0xa) 3044 #define USART0_RTS_PB0 SILABS_DBUS_USART0_RTS(0x1, 0x0) 3045 #define USART0_RTS_PB1 SILABS_DBUS_USART0_RTS(0x1, 0x1) 3046 #define USART0_RTS_PB2 SILABS_DBUS_USART0_RTS(0x1, 0x2) 3047 #define USART0_RTS_PB3 SILABS_DBUS_USART0_RTS(0x1, 0x3) 3048 #define USART0_RTS_PB4 SILABS_DBUS_USART0_RTS(0x1, 0x4) 3049 #define USART0_RTS_PB5 SILABS_DBUS_USART0_RTS(0x1, 0x5) 3050 #define USART0_RTS_PB6 SILABS_DBUS_USART0_RTS(0x1, 0x6) 3051 #define USART0_RTS_PC0 SILABS_DBUS_USART0_RTS(0x2, 0x0) 3052 #define USART0_RTS_PC1 SILABS_DBUS_USART0_RTS(0x2, 0x1) 3053 #define USART0_RTS_PC2 SILABS_DBUS_USART0_RTS(0x2, 0x2) 3054 #define USART0_RTS_PC3 SILABS_DBUS_USART0_RTS(0x2, 0x3) 3055 #define USART0_RTS_PC4 SILABS_DBUS_USART0_RTS(0x2, 0x4) 3056 #define USART0_RTS_PC5 SILABS_DBUS_USART0_RTS(0x2, 0x5) 3057 #define USART0_RTS_PC6 SILABS_DBUS_USART0_RTS(0x2, 0x6) 3058 #define USART0_RTS_PC7 SILABS_DBUS_USART0_RTS(0x2, 0x7) 3059 #define USART0_RTS_PC8 SILABS_DBUS_USART0_RTS(0x2, 0x8) 3060 #define USART0_RTS_PC9 SILABS_DBUS_USART0_RTS(0x2, 0x9) 3061 #define USART0_RTS_PD0 SILABS_DBUS_USART0_RTS(0x3, 0x0) 3062 #define USART0_RTS_PD1 SILABS_DBUS_USART0_RTS(0x3, 0x1) 3063 #define USART0_RTS_PD2 SILABS_DBUS_USART0_RTS(0x3, 0x2) 3064 #define USART0_RTS_PD3 SILABS_DBUS_USART0_RTS(0x3, 0x3) 3065 #define USART0_RTS_PD4 SILABS_DBUS_USART0_RTS(0x3, 0x4) 3066 #define USART0_RTS_PD5 SILABS_DBUS_USART0_RTS(0x3, 0x5) 3067 #define USART0_RX_PA0 SILABS_DBUS_USART0_RX(0x0, 0x0) 3068 #define USART0_RX_PA1 SILABS_DBUS_USART0_RX(0x0, 0x1) 3069 #define USART0_RX_PA2 SILABS_DBUS_USART0_RX(0x0, 0x2) 3070 #define USART0_RX_PA3 SILABS_DBUS_USART0_RX(0x0, 0x3) 3071 #define USART0_RX_PA4 SILABS_DBUS_USART0_RX(0x0, 0x4) 3072 #define USART0_RX_PA5 SILABS_DBUS_USART0_RX(0x0, 0x5) 3073 #define USART0_RX_PA6 SILABS_DBUS_USART0_RX(0x0, 0x6) 3074 #define USART0_RX_PA7 SILABS_DBUS_USART0_RX(0x0, 0x7) 3075 #define USART0_RX_PA8 SILABS_DBUS_USART0_RX(0x0, 0x8) 3076 #define USART0_RX_PA9 SILABS_DBUS_USART0_RX(0x0, 0x9) 3077 #define USART0_RX_PA10 SILABS_DBUS_USART0_RX(0x0, 0xa) 3078 #define USART0_RX_PB0 SILABS_DBUS_USART0_RX(0x1, 0x0) 3079 #define USART0_RX_PB1 SILABS_DBUS_USART0_RX(0x1, 0x1) 3080 #define USART0_RX_PB2 SILABS_DBUS_USART0_RX(0x1, 0x2) 3081 #define USART0_RX_PB3 SILABS_DBUS_USART0_RX(0x1, 0x3) 3082 #define USART0_RX_PB4 SILABS_DBUS_USART0_RX(0x1, 0x4) 3083 #define USART0_RX_PB5 SILABS_DBUS_USART0_RX(0x1, 0x5) 3084 #define USART0_RX_PB6 SILABS_DBUS_USART0_RX(0x1, 0x6) 3085 #define USART0_RX_PC0 SILABS_DBUS_USART0_RX(0x2, 0x0) 3086 #define USART0_RX_PC1 SILABS_DBUS_USART0_RX(0x2, 0x1) 3087 #define USART0_RX_PC2 SILABS_DBUS_USART0_RX(0x2, 0x2) 3088 #define USART0_RX_PC3 SILABS_DBUS_USART0_RX(0x2, 0x3) 3089 #define USART0_RX_PC4 SILABS_DBUS_USART0_RX(0x2, 0x4) 3090 #define USART0_RX_PC5 SILABS_DBUS_USART0_RX(0x2, 0x5) 3091 #define USART0_RX_PC6 SILABS_DBUS_USART0_RX(0x2, 0x6) 3092 #define USART0_RX_PC7 SILABS_DBUS_USART0_RX(0x2, 0x7) 3093 #define USART0_RX_PC8 SILABS_DBUS_USART0_RX(0x2, 0x8) 3094 #define USART0_RX_PC9 SILABS_DBUS_USART0_RX(0x2, 0x9) 3095 #define USART0_RX_PD0 SILABS_DBUS_USART0_RX(0x3, 0x0) 3096 #define USART0_RX_PD1 SILABS_DBUS_USART0_RX(0x3, 0x1) 3097 #define USART0_RX_PD2 SILABS_DBUS_USART0_RX(0x3, 0x2) 3098 #define USART0_RX_PD3 SILABS_DBUS_USART0_RX(0x3, 0x3) 3099 #define USART0_RX_PD4 SILABS_DBUS_USART0_RX(0x3, 0x4) 3100 #define USART0_RX_PD5 SILABS_DBUS_USART0_RX(0x3, 0x5) 3101 #define USART0_CLK_PA0 SILABS_DBUS_USART0_CLK(0x0, 0x0) 3102 #define USART0_CLK_PA1 SILABS_DBUS_USART0_CLK(0x0, 0x1) 3103 #define USART0_CLK_PA2 SILABS_DBUS_USART0_CLK(0x0, 0x2) 3104 #define USART0_CLK_PA3 SILABS_DBUS_USART0_CLK(0x0, 0x3) 3105 #define USART0_CLK_PA4 SILABS_DBUS_USART0_CLK(0x0, 0x4) 3106 #define USART0_CLK_PA5 SILABS_DBUS_USART0_CLK(0x0, 0x5) 3107 #define USART0_CLK_PA6 SILABS_DBUS_USART0_CLK(0x0, 0x6) 3108 #define USART0_CLK_PA7 SILABS_DBUS_USART0_CLK(0x0, 0x7) 3109 #define USART0_CLK_PA8 SILABS_DBUS_USART0_CLK(0x0, 0x8) 3110 #define USART0_CLK_PA9 SILABS_DBUS_USART0_CLK(0x0, 0x9) 3111 #define USART0_CLK_PA10 SILABS_DBUS_USART0_CLK(0x0, 0xa) 3112 #define USART0_CLK_PB0 SILABS_DBUS_USART0_CLK(0x1, 0x0) 3113 #define USART0_CLK_PB1 SILABS_DBUS_USART0_CLK(0x1, 0x1) 3114 #define USART0_CLK_PB2 SILABS_DBUS_USART0_CLK(0x1, 0x2) 3115 #define USART0_CLK_PB3 SILABS_DBUS_USART0_CLK(0x1, 0x3) 3116 #define USART0_CLK_PB4 SILABS_DBUS_USART0_CLK(0x1, 0x4) 3117 #define USART0_CLK_PB5 SILABS_DBUS_USART0_CLK(0x1, 0x5) 3118 #define USART0_CLK_PB6 SILABS_DBUS_USART0_CLK(0x1, 0x6) 3119 #define USART0_CLK_PC0 SILABS_DBUS_USART0_CLK(0x2, 0x0) 3120 #define USART0_CLK_PC1 SILABS_DBUS_USART0_CLK(0x2, 0x1) 3121 #define USART0_CLK_PC2 SILABS_DBUS_USART0_CLK(0x2, 0x2) 3122 #define USART0_CLK_PC3 SILABS_DBUS_USART0_CLK(0x2, 0x3) 3123 #define USART0_CLK_PC4 SILABS_DBUS_USART0_CLK(0x2, 0x4) 3124 #define USART0_CLK_PC5 SILABS_DBUS_USART0_CLK(0x2, 0x5) 3125 #define USART0_CLK_PC6 SILABS_DBUS_USART0_CLK(0x2, 0x6) 3126 #define USART0_CLK_PC7 SILABS_DBUS_USART0_CLK(0x2, 0x7) 3127 #define USART0_CLK_PC8 SILABS_DBUS_USART0_CLK(0x2, 0x8) 3128 #define USART0_CLK_PC9 SILABS_DBUS_USART0_CLK(0x2, 0x9) 3129 #define USART0_CLK_PD0 SILABS_DBUS_USART0_CLK(0x3, 0x0) 3130 #define USART0_CLK_PD1 SILABS_DBUS_USART0_CLK(0x3, 0x1) 3131 #define USART0_CLK_PD2 SILABS_DBUS_USART0_CLK(0x3, 0x2) 3132 #define USART0_CLK_PD3 SILABS_DBUS_USART0_CLK(0x3, 0x3) 3133 #define USART0_CLK_PD4 SILABS_DBUS_USART0_CLK(0x3, 0x4) 3134 #define USART0_CLK_PD5 SILABS_DBUS_USART0_CLK(0x3, 0x5) 3135 #define USART0_TX_PA0 SILABS_DBUS_USART0_TX(0x0, 0x0) 3136 #define USART0_TX_PA1 SILABS_DBUS_USART0_TX(0x0, 0x1) 3137 #define USART0_TX_PA2 SILABS_DBUS_USART0_TX(0x0, 0x2) 3138 #define USART0_TX_PA3 SILABS_DBUS_USART0_TX(0x0, 0x3) 3139 #define USART0_TX_PA4 SILABS_DBUS_USART0_TX(0x0, 0x4) 3140 #define USART0_TX_PA5 SILABS_DBUS_USART0_TX(0x0, 0x5) 3141 #define USART0_TX_PA6 SILABS_DBUS_USART0_TX(0x0, 0x6) 3142 #define USART0_TX_PA7 SILABS_DBUS_USART0_TX(0x0, 0x7) 3143 #define USART0_TX_PA8 SILABS_DBUS_USART0_TX(0x0, 0x8) 3144 #define USART0_TX_PA9 SILABS_DBUS_USART0_TX(0x0, 0x9) 3145 #define USART0_TX_PA10 SILABS_DBUS_USART0_TX(0x0, 0xa) 3146 #define USART0_TX_PB0 SILABS_DBUS_USART0_TX(0x1, 0x0) 3147 #define USART0_TX_PB1 SILABS_DBUS_USART0_TX(0x1, 0x1) 3148 #define USART0_TX_PB2 SILABS_DBUS_USART0_TX(0x1, 0x2) 3149 #define USART0_TX_PB3 SILABS_DBUS_USART0_TX(0x1, 0x3) 3150 #define USART0_TX_PB4 SILABS_DBUS_USART0_TX(0x1, 0x4) 3151 #define USART0_TX_PB5 SILABS_DBUS_USART0_TX(0x1, 0x5) 3152 #define USART0_TX_PB6 SILABS_DBUS_USART0_TX(0x1, 0x6) 3153 #define USART0_TX_PC0 SILABS_DBUS_USART0_TX(0x2, 0x0) 3154 #define USART0_TX_PC1 SILABS_DBUS_USART0_TX(0x2, 0x1) 3155 #define USART0_TX_PC2 SILABS_DBUS_USART0_TX(0x2, 0x2) 3156 #define USART0_TX_PC3 SILABS_DBUS_USART0_TX(0x2, 0x3) 3157 #define USART0_TX_PC4 SILABS_DBUS_USART0_TX(0x2, 0x4) 3158 #define USART0_TX_PC5 SILABS_DBUS_USART0_TX(0x2, 0x5) 3159 #define USART0_TX_PC6 SILABS_DBUS_USART0_TX(0x2, 0x6) 3160 #define USART0_TX_PC7 SILABS_DBUS_USART0_TX(0x2, 0x7) 3161 #define USART0_TX_PC8 SILABS_DBUS_USART0_TX(0x2, 0x8) 3162 #define USART0_TX_PC9 SILABS_DBUS_USART0_TX(0x2, 0x9) 3163 #define USART0_TX_PD0 SILABS_DBUS_USART0_TX(0x3, 0x0) 3164 #define USART0_TX_PD1 SILABS_DBUS_USART0_TX(0x3, 0x1) 3165 #define USART0_TX_PD2 SILABS_DBUS_USART0_TX(0x3, 0x2) 3166 #define USART0_TX_PD3 SILABS_DBUS_USART0_TX(0x3, 0x3) 3167 #define USART0_TX_PD4 SILABS_DBUS_USART0_TX(0x3, 0x4) 3168 #define USART0_TX_PD5 SILABS_DBUS_USART0_TX(0x3, 0x5) 3169 #define USART0_CTS_PA0 SILABS_DBUS_USART0_CTS(0x0, 0x0) 3170 #define USART0_CTS_PA1 SILABS_DBUS_USART0_CTS(0x0, 0x1) 3171 #define USART0_CTS_PA2 SILABS_DBUS_USART0_CTS(0x0, 0x2) 3172 #define USART0_CTS_PA3 SILABS_DBUS_USART0_CTS(0x0, 0x3) 3173 #define USART0_CTS_PA4 SILABS_DBUS_USART0_CTS(0x0, 0x4) 3174 #define USART0_CTS_PA5 SILABS_DBUS_USART0_CTS(0x0, 0x5) 3175 #define USART0_CTS_PA6 SILABS_DBUS_USART0_CTS(0x0, 0x6) 3176 #define USART0_CTS_PA7 SILABS_DBUS_USART0_CTS(0x0, 0x7) 3177 #define USART0_CTS_PA8 SILABS_DBUS_USART0_CTS(0x0, 0x8) 3178 #define USART0_CTS_PA9 SILABS_DBUS_USART0_CTS(0x0, 0x9) 3179 #define USART0_CTS_PA10 SILABS_DBUS_USART0_CTS(0x0, 0xa) 3180 #define USART0_CTS_PB0 SILABS_DBUS_USART0_CTS(0x1, 0x0) 3181 #define USART0_CTS_PB1 SILABS_DBUS_USART0_CTS(0x1, 0x1) 3182 #define USART0_CTS_PB2 SILABS_DBUS_USART0_CTS(0x1, 0x2) 3183 #define USART0_CTS_PB3 SILABS_DBUS_USART0_CTS(0x1, 0x3) 3184 #define USART0_CTS_PB4 SILABS_DBUS_USART0_CTS(0x1, 0x4) 3185 #define USART0_CTS_PB5 SILABS_DBUS_USART0_CTS(0x1, 0x5) 3186 #define USART0_CTS_PB6 SILABS_DBUS_USART0_CTS(0x1, 0x6) 3187 #define USART0_CTS_PC0 SILABS_DBUS_USART0_CTS(0x2, 0x0) 3188 #define USART0_CTS_PC1 SILABS_DBUS_USART0_CTS(0x2, 0x1) 3189 #define USART0_CTS_PC2 SILABS_DBUS_USART0_CTS(0x2, 0x2) 3190 #define USART0_CTS_PC3 SILABS_DBUS_USART0_CTS(0x2, 0x3) 3191 #define USART0_CTS_PC4 SILABS_DBUS_USART0_CTS(0x2, 0x4) 3192 #define USART0_CTS_PC5 SILABS_DBUS_USART0_CTS(0x2, 0x5) 3193 #define USART0_CTS_PC6 SILABS_DBUS_USART0_CTS(0x2, 0x6) 3194 #define USART0_CTS_PC7 SILABS_DBUS_USART0_CTS(0x2, 0x7) 3195 #define USART0_CTS_PC8 SILABS_DBUS_USART0_CTS(0x2, 0x8) 3196 #define USART0_CTS_PC9 SILABS_DBUS_USART0_CTS(0x2, 0x9) 3197 #define USART0_CTS_PD0 SILABS_DBUS_USART0_CTS(0x3, 0x0) 3198 #define USART0_CTS_PD1 SILABS_DBUS_USART0_CTS(0x3, 0x1) 3199 #define USART0_CTS_PD2 SILABS_DBUS_USART0_CTS(0x3, 0x2) 3200 #define USART0_CTS_PD3 SILABS_DBUS_USART0_CTS(0x3, 0x3) 3201 #define USART0_CTS_PD4 SILABS_DBUS_USART0_CTS(0x3, 0x4) 3202 #define USART0_CTS_PD5 SILABS_DBUS_USART0_CTS(0x3, 0x5) 3203 3204 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG23_PINCTRL_H_ */ 3205
