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Searched refs:KINETIS_SCG_SPLL_ASYNC_DIV1_CLK (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dkinetis_scg.h30 #define KINETIS_SCG_SPLL_ASYNC_DIV1_CLK 14U macro
/Zephyr-latest/drivers/clock_control/
Dclock_control_mcux_scg.c101 case KINETIS_SCG_SPLL_ASYNC_DIV1_CLK: in mcux_scg_get_rate()