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Searched refs:INTR_RESP_READY_STAT (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/i3c/
Di3c_dw.c147 #define INTR_RESP_READY_STAT BIT(4) macro
155 INTR_CCC_UPDATED_STAT | INTR_TRANSFER_ABORT_STAT | INTR_RESP_READY_STAT | \
159 #define INTR_MASTER_MASK (INTR_TRANSFER_ERR_STAT | INTR_RESP_READY_STAT | INTR_IBI_THLD_STAT)
161 #define INTR_MASTER_MASK (INTR_TRANSFER_ERR_STAT | INTR_RESP_READY_STAT)
165 INTR_DYN_ADDR_ASSGN_STAT | INTR_RESP_READY_STAT)
1355 if (status & (INTR_TRANSFER_ERR_STAT | INTR_RESP_READY_STAT)) { in i3c_dw_irq()