Home
last modified time | relevance | path

Searched refs:HP_SRAM_WIN1_BASE (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/soc/intel/intel_adsp/ace/
Dmmu_ace30.c56 .start = (uint32_t)HP_SRAM_WIN1_BASE,
57 .end = (uint32_t)HP_SRAM_WIN1_BASE + (uint32_t)HP_SRAM_WIN1_SIZE,
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dmem_window.h26 #define HP_SRAM_WIN1_BASE L2_SRAM_BASE + WIN1_OFFSET macro