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Searched refs:GPDMA_CHLLPC_OFFSET (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/dma/
Ddma_intel_adsp_gpdma.c18 #define GPDMA_CHLLPC_OFFSET(channel) (0x0010 + channel*0x10) macro
67 llpc = dw_read(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel)); in intel_adsp_gpdma_dump_registers()
95 dw_write(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel), in intel_adsp_gpdma_llp_config()
107 val = dw_read(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel)); in intel_adsp_gpdma_llp_enable()
109 dw_write(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel), in intel_adsp_gpdma_llp_enable()
122 val = dw_read(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel)); in intel_adsp_gpdma_llp_disable()
123 dw_write(dev_cfg->shim, GPDMA_CHLLPC_OFFSET(channel), in intel_adsp_gpdma_llp_disable()