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Searched refs:FPGA_ICE40_LEADING_CLOCKS_MIN (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/fpga/
Dfpga_ice40_common.h27 #define FPGA_ICE40_LEADING_CLOCKS_MIN 8 macro
37 BUILD_ASSERT(DT_INST_PROP(inst, leading_clocks) >= FPGA_ICE40_LEADING_CLOCKS_MIN); \