1 /* 2 * Copyright (c) 2017 Linaro Limited. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file SoC configuration macros for the ARM Ltd MPS2. 9 * 10 */ 11 12 #ifndef _ARM_MPS2_REGS_H_ 13 #define _ARM_MPS2_REGS_H_ 14 15 #include <zephyr/sys/util.h> 16 #include <zephyr/types.h> 17 18 /* Registers in the FPGA system control block */ 19 struct mps2_fpgaio { 20 /* Offset: 0x000 LED connections */ 21 volatile uint32_t led0; 22 /* Offset: 0x004 RESERVED */ 23 volatile uint32_t reserved1; 24 /* Offset: 0x008 Buttons */ 25 volatile uint32_t button; 26 /* Offset: 0x00c RESERVED */ 27 volatile uint32_t reserved2; 28 /* Offset: 0x010 1Hz up counter */ 29 volatile uint32_t clk1hz; 30 /* Offset: 0x014 100Hz up counter */ 31 volatile uint32_t clk100hz; 32 /* Offset: 0x018 Cycle up counter */ 33 volatile uint32_t counter; 34 /* Offset: 0x01c Reload value for prescale counter */ 35 volatile uint32_t prescale; 36 /* Offset: 0x020 32-bit Prescale counter */ 37 volatile uint32_t pscntr; 38 /* Offset: 0x024 RESERVED */ 39 volatile uint32_t reserved3[10]; 40 /* Offset: 0x04c Misc control */ 41 volatile uint32_t misc; 42 }; 43 44 /* Defines for bits in fpgaio led0 register */ 45 #define FPGAIO_LED0_USERLED0 0 46 #define FPGAIO_LED0_USERLED1 1 47 48 /* Defines for bits in fpgaio button register */ 49 #define FPGAIO_BUTTON_USERPB0 0 50 #define FPGAIO_BUTTON_USERPB1 1 51 52 /* Defines for bits in fpgaio misc register */ 53 #define FPGAIO_MISC_CLCD_CS 0 54 #define FPGAIO_MISC_SPI_SS 1 55 #define FPGAIO_MISC_CLCD_RESET 3 56 #define FPGAIO_MISC_CLCD_RS 4 57 #define FPGAIO_MISC_CLCD_RD 5 58 #define FPGAIO_MISC_CLCD_BL_CTRL 6 59 #define FPGAIO_MISC_ADC_SPI_CS 7 60 #define FPGAIO_MISC_SHIELD0_SPI_CS 8 61 #define FPGAIO_MISC_SHIELD1_SPI_CS 9 62 63 #endif /* _ARM_MPS2_REGS_H_ */ 64
