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Searched refs:FIUDIV_VAL (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/soc/nuvoton/npcx/common/
Dsoc_clock.h95 #define FIUDIV_VAL 1 /* FIU_CLK = CORE_CLK/2 */ macro
97 #define FIUDIV_VAL 0 /* FIU_CLK = CORE_CLK */ macro
161 #define VAL_HFCBCD ((FIU1DIV_VAL << 4) | (FIUDIV_VAL << 2))
163 #define VAL_HFCBCD (FIUDIV_VAL << 4)
/Zephyr-latest/drivers/clock_control/
Dclock_control_npcx.c92 *rate = CORE_CLK/(FIUDIV_VAL + 1); in npcx_clock_control_get_subsys_rate()
163 BUILD_ASSERT(CORE_CLK / (FIUDIV_VAL + 1) <= (MAX_OFMCLK / 2) &&
164 CORE_CLK / (FIUDIV_VAL + 1) >= MHZ(4),
Dclock_control_npcm.c101 #define FIUDIV_VAL (DT_PROP(DT_NODELABEL(pcc), fiu_prescaler) - 1) macro
274 *rate = CORE_CLK / (FIUDIV_VAL + 1); in npcm_clock_control_get_subsys_rate()
353 priv->hfcbcd1 = (I3CDIV_VAL << 2) | FIUDIV_VAL; in npcm_clock_control_init()