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Searched refs:ETH_XLNX_GEM_PHY_MAINT_PHY_ADDRESS_MASK (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/ethernet/
Dphy_xlnx_gem.c72 reg_val |= (((uint32_t)phy_addr & ETH_XLNX_GEM_PHY_MAINT_PHY_ADDRESS_MASK) << in phy_xlnx_gem_mdio_read()
151 reg_val |= (((uint32_t)phy_addr & ETH_XLNX_GEM_PHY_MAINT_PHY_ADDRESS_MASK) << in phy_xlnx_gem_mdio_write()
Deth_xlnx_gem_priv.h400 #define ETH_XLNX_GEM_PHY_MAINT_PHY_ADDRESS_MASK 0x0000001F macro