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Searched refs:ENABLE (Results 1 – 25 of 29) sorted by relevance

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/Zephyr-latest/drivers/pwm/
Dpwm_sam0_tc.c107 regs->COUNT8.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()
111 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()
121 regs->COUNT16.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()
125 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()
165 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
176 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
Dpwm_sam0_tcc.c92 regs->CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()
96 regs->CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()
132 regs->CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
/Zephyr-latest/drivers/watchdog/
Dwdt_sam0.c54 WDT_REGS->CTRLA.bit.ENABLE = on; in wdt_sam0_set_enable()
56 WDT_REGS->CTRL.bit.ENABLE = on; in wdt_sam0_set_enable()
63 return WDT_REGS->CTRLA.bit.ENABLE; in wdt_sam0_is_enabled()
65 return WDT_REGS->CTRL.bit.ENABLE; in wdt_sam0_is_enabled()
/Zephyr-latest/soc/ambiq/apollo3x/
Dsoc.c35 MCUCTRL->TPIUCTRL_b.ENABLE = MCUCTRL_TPIUCTRL_ENABLE_EN; in soc_early_init_hook()
/Zephyr-latest/soc/atmel/sam0/common/
Dsoc_saml2x.c39 OSCCTRL->OSC16MCTRL.bit.ENABLE = 0; in gclk_reset()
187 OSCCTRL->DFLLCTRL.bit.ENABLE = 1; in dfll48m_init()
Dsoc_samd2x.c203 SYSCTRL->DFLLCTRL.bit.ENABLE = 1; in dfll48m_init()
285 SYSCTRL->OSC8M.bit.ENABLE = 0; in osc8m_disable()
Dsoc_samd5x.c57 OSCCTRL->Dpll[n].DPLLCTRLA.bit.ENABLE = 0; in dpll_init()
/Zephyr-latest/drivers/spi/
DKconfig.mcux_dspi19 bool "ENABLE EDMA for DSPI driver"
Dspi_sam0.c117 ctrla.bit.ENABLE = 1; in spi_sam0_configure()
134 regs->CTRLA.bit.ENABLE = 0; in spi_sam0_configure()
/Zephyr-latest/drivers/usb/udc/
Dudc_dwc2_vendor_quirks.h201 wrapper->ENABLE = USBHS_ENABLE_PHY_Msk | USBHS_ENABLE_CORE_Msk; in usbhs_enable_core()
220 wrapper->ENABLE = 0UL; in usbhs_disable_core()
/Zephyr-latest/drivers/dac/
Ddac_sam0.c101 regs->CTRLA.bit.ENABLE = 1; in dac_sam0_init()
/Zephyr-latest/drivers/entropy/
Dentropy_sam.c157 trng->CTRLA.bit.ENABLE = 1; in entropy_sam_init()
/Zephyr-latest/drivers/adc/
Dadc_sam0.c167 adc->CTRLA.bit.ENABLE = 0; in adc_sam0_channel_setup()
173 adc->CTRLA.bit.ENABLE = 1; in adc_sam0_channel_setup()
482 adc->CTRLA.bit.ENABLE = 1; in adc_sam0_init()
/Zephyr-latest/drivers/interrupt_controller/
Dintc_sam0_eic.c45 EIC->CTRLA.bit.ENABLE = on; in set_eic_enable()
47 EIC->CTRL.bit.ENABLE = on; in set_eic_enable()
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio.c2005 NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Disabled; in radio_ccm_ext_rx_pkt_set()
2006 NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled; in radio_ccm_ext_rx_pkt_set()
2138 NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Disabled; in radio_ccm_ext_tx_pkt_set()
2139 NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled; in radio_ccm_ext_tx_pkt_set()
2261 NRF_AAR->ENABLE = (AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos) & in radio_ar_configure()
2288 NRF_AAR->ENABLE = (AAR_ENABLE_ENABLE_Disabled << AAR_ENABLE_ENABLE_Pos) & in radio_ar_status_reset()
2321 NRF_AAR->ENABLE = (AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos) & in radio_ar_resolve()
2347 NRF_AAR->ENABLE = (AAR_ENABLE_ENABLE_Disabled << AAR_ENABLE_ENABLE_Pos) & in radio_ar_resolve()
/Zephyr-latest/drivers/dma/
Ddma_sam0.c282 chcfg->CHCTRLA.bit.ENABLE = 1; in dma_sam0_start()
307 chcfg->CHCTRLA.bit.ENABLE = 0; in dma_sam0_stop()
/Zephyr-latest/boards/adi/sdp_k1/
Dadi_sdp_120pin_connector.dtsi105 * STM32F469. TAKE CARE NOT TO ENABLE SPI AND QUADSPI ON
/Zephyr-latest/drivers/cache/
Dcache_nrf.c163 if (!(cache->ENABLE & CACHE_ENABLE_ENABLE_Enabled)) { in _cache_checks()
/Zephyr-latest/drivers/i2c/
Di2c_sam0.c691 i2c->CTRLA.bit.ENABLE = 0; in i2c_sam0_configure()
696 i2c->CTRLA.bit.ENABLE = 1; in i2c_sam0_configure()
765 i2c->CTRLA.bit.ENABLE = 1; in i2c_sam0_initialize()
/Zephyr-latest/drivers/usb/common/nrf_usbd_common/
Dnrf_usbd_common.c1006 NRF_USBD->ENABLE = 1; in usbd_enable()
1156 NRF_USBD->ENABLE = 0; in nrf_usbd_common_enable()
1230 NRF_USBD->ENABLE = 0; in nrf_usbd_common_disable()
/Zephyr-latest/boards/shields/esp_8266/doc/
Dindex.rst34 | CHIP_EN | ENABLE (VDD = RUN, GND = LOW POWER) |
/Zephyr-latest/drivers/flash/
Dflash_cadence_nand_ll.h170 #define ENABLE (1) macro
/Zephyr-latest/drivers/serial/
Duart_sam0.c401 usart->CTRLA.bit.ENABLE = 0; in uart_sam0_configure()
487 usart->CTRLA.bit.ENABLE = 1; in uart_sam0_configure()
633 usart->CTRLA.bit.ENABLE = 1; in uart_sam0_init()
/Zephyr-latest/drivers/counter/
Dcounter_sam0_tc32.c384 tc->CTRLA.bit.ENABLE = 1; in counter_sam0_tc32_initialize()
/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam0.c286 regs->CTRLA.bit.ENABLE = 1; in usb_dc_attach()

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