Searched refs:EMMC_HOST_CLK_SDCLCK_FREQ_SEL_UPPER_MASK (Results 1 – 2 of 2) sorted by relevance
52 #define EMMC_HOST_CLK_SDCLCK_FREQ_SEL_UPPER_MASK 0x03 macro
265 EMMC_HOST_CLK_SDCLCK_FREQ_SEL_UPPER_MASK, clock_divider >> 8); in emmc_clock_set()