Searched refs:DMA_DW_AXI_CTL_SRC_WIDTH (Results 1 – 1 of 1) sorted by relevance
131 #define DMA_DW_AXI_CTL_SRC_WIDTH(x) FIELD_PREP(GENMASK64(10, 8), x) macro372 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_8); in dma_dw_axi_set_data_width()376 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_16); in dma_dw_axi_set_data_width()380 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_32); in dma_dw_axi_set_data_width()384 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_64); in dma_dw_axi_set_data_width()388 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_128); in dma_dw_axi_set_data_width()392 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_256); in dma_dw_axi_set_data_width()396 lli_desc->ctl |= DMA_DW_AXI_CTL_SRC_WIDTH(BITS_512); in dma_dw_axi_set_data_width()
